Electronic – Are silicon microbolometers inherently more expensive than conventional CMOS light sensors

cmosfabricationimage-sensor

We're finally starting to see practical thermal imaging sensors (microbolometers) entering the consumer market. However, they are still vastly more expensive than comparable visible imaging sensors. The most basic 384×288 17µm pixel (i.e., 32mm2) thermal imagers run about $500, whereas $500 will get a 6000×4000 2µm pixel (i.e., 96mm2) CMOS sensor … plus 5-axis sensor stabilization and more.

My question: Assuming the same economies of scale were applied as are already used for conventional CMOS sensors, is the manufacturing process for silicon microbolometers inherently more expensive? Or in the limit is it still just some (similar) number of photolithographic steps?

To elaborate: Thermal cameras look for radiation with wavelengths between 7-14µm, whereas visible light is in the range 0.4-0.7µm. Based on the physics alone, at the diffraction limit microbolometer pixels will have an order of magnitude greater surface area. Apparently commercial sensors are at the diffraction limit for both visible light (at 1 micron pixels) and thermal light (at 17 micron pixels). So, to make it fair, we might compare a 1" 24Mpx visible sensor with a 1" 300kpx thermal sensor.

Both sensors can be made from silicon using a CMOS process. The structure of microbolometers looks a little trickier than state-of-the-art visible spectrum CMOS sensors, requiring a thermal bridge for each pixel as well as vacuum encapsulation of the sensor. But I know little of large-scale manufacturing processes, so are these variables significant in the limit on a per-unit basis?

Best Answer

Microbolometers are inherently more expensive than other silicon ICs specifically because of their required 3-dimensional structure. In order to suspend the sensor pixels on thermal bridges the sensor layer has to be put on a substrate that is subsequently etched out from underneath the ~17-micron panels. Many procedures that are commonly used on CMOS to do something quick (such as fairly harsh cleaning steps, CMP, etc.) have to be replaced by more complex, slow alternatives, and even those have a significant enough failure rate that more chips have to be scrapped. For example, immersing the wafers into liquids or any process that involves a flow of some medium over them has to be done extremely carefully and slowly. Surface tension is a huge problem when it comes time to get the liquid etching reagent out from under those pixels without breaking them: You can't blow it off with pressure or boil it off with heat.

To give an idea of how sensitive they are: Here is an electron micrograph of an array that was hit with compressed air to remove dust:

Electron micrograph of damaged microbolometer array

The 3-D fabrication problems with microbolometers are comparable to the ones involved in making DLP chips, which remained relatively expensive even in large-scale production for consumer devices.

(Microbolometers are made that use only amorphous silicon, but for performance a vanadium oxide sensor is preferred. Adding VO necessitates a separate and more expensive fabrication line because it is a hazardous substance.)