Just for the sake of completeness (since I was recently reminded about this question) I'll restate the answer that I finally settled on:
Given the following MPD snippet provided by the core vendor:
PORT IIC_DATA = "", DIR = IO, THREE_STATE=TRUE
PORT IIC_CLOCK = "", DIR = O, THREE_STATE=TRUE
I replace it with the following:
PORT IIC_DATA_I = "", DIR = I
PORT IIC_DATA_O = "", DIR = O
PORT IIC_DATA_T = "", DIR = O
PORT IIC_DATA = "", DIR = IO, THREE_STATE=TRUE, TRI_I = IIC_DATA_I, TRI_O = IIC_DATA_O, TRI_T = IIC_DATA_T
PORT IIC_CLOCK_O = "", DIR = O
PORT IIC_CLOCK_T = "", DIR = O
PORT IIC_CLOCK = "", DIR = O, THREE_STATE=TRUE, TRI_O = IIC_CLOCK_O, TRI_T = IIC_CLOCK_T
This works fine (as the underlying signals were defined in the VHDL anyway). It's a little bit of a hassle as I have to remember to do this each time I get an updated core from the vendor, but this is infrequent enough to not be a big deal. (I've been trying to persuade the vendor to add it themselves, but haven't had much luck thus far.)
Turns out it was simple after all -- I was just looking at the wrong IP core. For future reference, the correct core to use for this scenario is the EPC (external peripheral controller), not the EMC (external memory controller).
The EPC core has options to use a multiplexed address/data bus as expected.
Best Answer
Here is a little overview on chip internal buses, which are suitable for FPGAs:
Advanced Microcontroller Bus Architecture (AMBA) from ARM Ltd.
Current version: 5 Specifications
Further reading: Wikipedia
Commonly known buses in that family:
Variants: AXI-Lite, AXI-Stream
Avalon from Altera now part of Intel
Current version from 12.2015: Avalon Interface Specifications
CoreConnect from IBM
Current version: 4.6 Specification (no official link found)
Further reading: Wikipedia
Commonly known buses from that family:
Open Core_Protocol (OCP) from OCP International Partnership Association
Current version: 3.0 Specification
Further reading: Wikipedia
WishBone from OpenCores.org
Current version B4: Specification
Further reading: Wikipedia