Electronic – Bipolar Junction Transistor Base-Emitter voltage

First, lets look at why there's only very small current in a reverse-biased pn-junction diode. The junction doesn't block all current when reverse biased. The electric field in the junction opposes the majority carrier current whether forward-biased or reverse-biased, but quickly sweeps any available minority carriers (electrons in the p-region, holes in the n-region) across it. In forward bias, minority carriers are being continuously injected from the contacts, so there is a sustained current. In reverse bias conditions, there's very few minority carriers available, so the junction carries all the available carriers away in a very short time, and there's no more carriers available to sustain a current.

So what happens in a forward-active BJT is that the forward biased base-emitter junction creates a large number of minority carriers in the base region. The (reverse-biased) collector-base junction then has no problem "finding" carriers to create a current, and so you can have a large collector current.

It is not correct that the depletion regions of the two junctions overlap. If that happens, you have a condition called "punch-through" where there is no gain in the device.

I found a slide-set that gives a very quick explanation of BJT operation here. In particular note that current in the depletion regions is mainly caused by "drift" (carriers being pushed around by electric fields), but in the bulk regions it is mainly caused by diffusion --- that is simply carriers randomly moving around, so that the net movement is from areas of high concentration to areas of low concentration. Finally, remember that the important currents are the minority-carrier currents.

Edit

My explanation of forward biased operation was not right. Let's try again: Whether the junction is forward or reverse biased, the electric field in the depletion region (the area right around the junction) opposes "majority" carriers crossing the junction and encourages minority carriers. In forward bias, the size of this barrier is reduced to the point where some fraction of the majority carriers have enough thermal energy to overcome the barrier. But anyway, the operation in reverse bias is more important to answering your question.

When electrons flow through a forward-biased diode junction, such as the base-emitter junction of a transistor, it actually takes a non-zero amount of time for them to recombine with holes on the P side and be neutralized.

In an NPN transistor, the P-type base region is constructed so as to be so narrow that most of the electrons actually pass all of the way through it before this recombination occurs. Once they reach the depletion region of the reverse-biased base-collector junction, which has a strong electrical field across it, they are quickly swept away from the base region altogether, creating the collector current.

The total current through the base-emitter junction is controlled by the base-emitter voltage, which is independent of the collector voltage. This is described by the famous Ebers-Moll equation. If the collector is open-circuit, all of this current flows out the base connection. But as long as there's at least a small positive bias on the collector-base junction, most of the current is diverted to the collector and only a small fraction remains to flow out of the base.

In a high-gain transistor, fewer than 1% of the electrons actually recombine in the base region, where they remain as the base-emitter current, which means that the collector current can be 100× or more the base current. This process is optimized through careful control of both the geometry of the three regions and the specific doping levels used in each of them.

As long as the transistor is biased in this mode of operation, a tiny change in base-emitter voltage (and a correspondingly small change in base-emitter current) causes a much larger change in collector-emitter current. Depending on the external impedance connected to the collector, this can also cause a large change in collector voltage. The overall circuit exhibits power gain because the output power (ΔV_C × ΔI_C) is much greater than the input power (ΔV_B × ΔI_B). Depending on the specific circuit configuration, this power gain can be realized as either voltage gain, current gain, or a combination of both.

Essentially the same thing happens in a PNP transistor, but now you have to think of the holes (the absence of an electron) as being the carrier of a positive charge that drifts all of the way through the N-type base to the collector.