Electronic – Calculating the square root of 8-bit binary number

Before you can answer this question, you have to understand the various binary encodings being talked about. The two in question are 2s complement and sign-magnitude

1. Sign-Magnitude

   Zero and positive numbers are represented as you would probably expect. Let's say we have 4 bit binary. 0000 is zero, 0001 is one, 0010 is two, etc. Each digit position is worth the number base times the one on its right. The right most is worth one. Therefore, in binary, the digit positions from right to left are worth 1, 2, 4, and 8. To decode a number, you multiply each digit by the worth of its bit position, and add up the results. For example, 1010 would be 1x8 + 0x4 + 1x2 + 0x1 = ten. This is exactly how numbers are written in other bases, including decimal. The decimal number 1234 has the value 1x1000 + 2x100 + 3x10 + 4x1.

   The problem is how to represent negative numbers. When writing in decimal, we put a negative sign in front of the number. That's pretty much what sign-magnitude binary representation does too. Usually the high bit is reserved as the "sign" bit, with 0 indicating zero or positive and 1 indicating negative. The rest of the bits have the same meaning as before.

   For example, using 4 bit numbers again, 0101 is five (1x4 + 0x2 + 1x1). To make negative 5, we simply set the sign bit resulting in 1101. So in 4 bit sign-magnitude format, the binary number 1101 has the value minus five.

2. 2s Complement

   The above works fine and is a lot like what we do ourselves with decimal, but it's not so convenient to implement with logic gates in a computer. Nowadays, 2s complement is pretty much universal inside computers. Zero and positive numbers are represented as before. The difference is how negative numbers are represented.

   One advantage of 2s complement is that nothing special needs to be done to add negative versus positive numbers. Think about what bit pattern would result in 0000 after you add 1 to it. If the addition rule is followed, then whatever that number is must be -1. Hopefully you know how to add binary numbers, and can see that 1111 + 0001 results in 0000. Actually it results in 10000, but since we are only dealing with 4 bit numbers, the fifth bit that results from the add is lost and we are left with the low 4 bits 0000. There are only 16 possible values a 4 bit binary number can represent, and if using the 2s complement scheme they are:

   Binary  Decimal
     0111        7
     0110        6
     0101        5
     0100        4
     0011        3
     0010        2
     0001        1
     0000        0
     1111       -1
     1110       -2
     1101       -3
     1100       -4
     1011       -5
     1010       -6
     1001       -7
     1000       -8
   

So maybe you can see that the question you asked is ambiguous. It is important to know the width of the binary number being used. For example, if the question is assuming 4 bits numbers as my example above, then 11 (assumed to be 0011 with the leading zeros not shown) is three. The same is true for a bit width of 3 or more. If it is only 2 bits, then there are only 4 possible values such a number can express.

This is your homework, so I'm not just going to give you the answer. A good way to proceed would be to make a table of all possible 2 bit binary numbers and their decimal equivalents as I did above, but for both 2s complement and sign-magnitude. If you show at least a reasonable attempt, we can discuss it further.

Even a PLL isn't going to preserve the waveform (including duty cycle) of its reference input, unless you add a second circuit to it to specifically do that. For example, the PLL could drive a one-shot whose pulse width is controlled by a feedback loop that compares the output duty cycle with the input duty cycle.

The best way to do this in an all-digital manner is to have one circuit that measures the frequency and duty cycle of the input signal (if those are the only two parameters you care about), and have another circuit that synthesizes a new signal with the same duty cycle and the desired frequency based on those measured values. (I have done something like this myself when building FPGAs that need to do frame rate doubling/halving on video signals.)

The output signal will in most cases be an approximation of the signal you actually want, and you'll have to decide how good that approximation needs to be.