Input Leakage Current
To determine your resistors voltage drop from the gate you need to use the leakage current from the datasheet. Microchip specifies an "Input Leakage Current" on their datasheets. The [datasheet that I have looked up][1] specifies an input leakage current of 1uA. This could cause a .1V or 100mV, which is only double what Robert calculated, probably not a problem on your signal.
Now remember, if you are dividing a 30V signal down to 30/11 (2.7v) volts full read then the 100mV is added to this, causing up to 3% error on your 30V signal.
If you need a resolution of 1V, divide that by 11 and then add the 100mV. This 100mV could be larger than the 1V signal.
Input Capacitance
Robert is correct, there will be a capacitance, but this really specifies an amount of time that is needed to take the ADC measurement. This also, combined with the input resistance you chose, creates a low pass filter; if you were wanting to measure signals with a higher frequency, you are not going to be able to capture them.
Reducing the error
The easiest way is to either reduce your resistance on your divider, or to buffer your signal. When you buffer the signal you will replace the PIC's leakage current with your op-amps leakage current which you can get quite low.
This 1uA is a worst case, unless it costs you a large amount to make minor changes to the design, fab your design and test how bad it is for you.
Please let me know if there is anything I can do to make this easier to read.
Yes, from the datasheet:
Due to the analog input resistive divider formed by R1
and R2 in Figure 5, any significant analog input source
resistance (R SOURCE) results in gain error. Furthermore, R SOURCE causes distortion due to nonlinear
analog input currents. Limit RSOURCE to a maximum
of 100Ω.
So practically, this means you need to drive the input with an amplifier. Although, a resistor divider made with a 192 Ω and 200 Ω resistor will meet specs if your signal has a low output impedance.
Best Answer
As long as U1 is active and the output is stable (which may be negatively affected by the C2), the impedance looking into Vdiv is 2.2K || 990K || 100nF.
At 50Hz, approximately 2.2K.
As @Neil_UK suggests, maybe consider a circuit more like this one:
simulate this circuit – Schematic created using CircuitLab
Make sure the maximum peak voltage divided by the 990K does not exceed the minimum current draw of whatever is connected to the +5V supply unless your regulator can sink current (most can't). If necessary, you can add a 5mA power LED or whatever. Otherwise, a positive transient could lift the +5V rail and possibly damage something.