communicationpcie
Figure shows basic architecture of PCIe. From what I understood, Root complex block will convert data into PCIe format. That means PCIe endpoint to endpoint communication will happens through Root complex block.
Am I right ? If yes what is the purpose of Switch?
Looking through the datasheet it looks like the CC6678 can operate in root complex mode so you should be able to connect the two. I did a similar board for testing a large batch of pcie cards.
If I were going to try it I'd start with a 4 layer board. You're going to want nice 100Ohm differential pairs to connect your lanes together. It only supports 1 or two of them so that shouldn't be a problem. Just run them over a GND plane on layer two. Just follow good practice here for routing HS signals. Oh and Tx -> Rx, and watch your polarities :)
I saw the clock generator you picked from your other post, I'd probably put a 1->2 fanout buffer and drive one to each of your pcie slots.
You're going to need to generate a reset pulse for the cards as usually the mother board would do that. You could just slap down a simple supervisor that monitors 12V and tie it's reset output to both connectors. Maybe add a pushbutton too so you can reset manually during debug. I used a Linear LTC2916CDDB-1#TRMPBF.
You're going to need 12V and 3.3V to power the connectors. I just used a standard desktop pc power supply because I had a bunch and they're easy to get. I just used a standard mother board power supply connector (Molex 44206-0007) and I put a little toggle switch from PS_ON to GND to turn things on and off. Oh and throw in a few 100uF tantalums on each rail for good measure.
Don't be nervous keep the lanes short, match the impedances and you should be fine.
Here's a pinout if you need one:
So, the way PCIe links work is they come up as gen 1 x1 links, then negotiate up to more lanes and higher speeds. If you wire the card with multiple devices connected to the edge connector, only the one connected to lane 0 will work, the rest will not enumerate. Unless, of course, you can reconfigure whatever switch port drives the slot in question to bifurcate the slot into the lane configuration you need. This is certainly not something that you can rely on - it not only requires the switch or bridge to support that configuration, but it also requires that the ability to change the configuration is exposed somewhere. All this will be highly dependent on the exact motherboard in use, the PCIe related chips installed, how they are wired, and how the BIOS is written. Not to mention this also prevents the card from working properly in systems that only connect 1 or 2 lanes instead of all 4, which happens occasionally, though most commonly with x16 slots wired as x8 or x4.
Best Answer
PCIe is a packet switched network. The root complex provides access to system memory from the bus to facilitate DMA operations as well as providing a method for the CPU to initiate bus transactions. However, any device on a PCIe bus can initiate a transaction to any other device - the root complex does not have to be involved, except for setting up the address space on startup. The root complex generally contains a switch as well so that it can route PCIe traffic between its ports. Traffic between endpoints does not have to pass through the root complex if there is a shorter route through the switches. Extra switches can be added to provide more PCIe ports as the root complex can be a bit limited in terms of the number of ports it supports, and the root complex ports should be reserved for the highest bandwidth devices.