Modern x86 processors have at least 512K of L2 cache. There are applications which would fit entirely into this amount of memory. Can you run these chips with no RAM attached? If so, is there a way to do it that eliminates the writeback timing penalty when the CPU attempts to maintain RAM coherency?
I don't have a specific application in mind, it's just idle curiosity. I'm certain that somewhere there is a niche application where this would be useful though.
Yes you can. By faking reads from consecutive (non-existant) physical memory locations, you set the tags in the cache. Then you switch off further filling of the cachelines and enter writeback, thus confining reads/writes to the cache and it will behave as a normal RAM.
Some of the bios-replacement projects do this because then you can spend much more code on the chipset and chipset memory controller setup, so you can write it in C for example.
This practice is widely used for embedded-class CPUs as well for handling bootloaders. The methods to turn the cache into a RAM-like mode vary a bit.
For a brief low-level introduction you can check out this presentation.
Note that as others have pointed out you still need to load the boot-code from somewhere obviously.