I have designed the schematic diagram of the inner components of the 555 Timer IC for understanding the working of the IC, but not sure if I have designed it correctly or not.
If it is correct can anyone please help me to understand how the Reset is working on the RS flip-flop.
Electronic – Cannot Understand the 555 IC Reset
circuit-designintegrated-circuitne555schematics
Best Answer
No, it is not correct.
The reset pin is an active-low additional reset line of the flip flop, as shown before (and on the functional description on the 555 datasheet).
Your schematics must be modified. Here's my suggestions (in red).
Basically, the inverter creates an active high-reset. The OR gate allows to reset the flip flop either due to "threshold" voltage exceeded (CMP2 output high) or due to external reset (low) on pin 4. Basically it creates an additional reset input.