Is it possible to cascade several different ICs on the same data line, in order to use less CS pins, by tying the digital output of each to the digital input of the next? I am familiar with this approach on similar/equal devices, but I'm not sure if there are some additional issues I should be watching out for.
EDIT: By digital output I pin the output pin many SPI devices provide, e.g. MAX395 or 74HC595 Shift registers.
Best Answer
No, you cannot do what you are thinking (if you are thinking what I think you are thinking) with just any SPI devices.
The devices you have pointed to are not SPI devices, but shift registers. They do not operate in quite the same way as SPI, however SPI can be used to drive them.
They are actually more akin to JTAG than SPI.
In a shift register or JTAG device the data input (TDI in JTAG parlance) is fed into a simple shift register, and the final bit output of the shift register falls out into the data output (TDO in JTAG). That's not how SPI works.
In SPI the SDI and SDO pins are completely separate and the relationship between the data in one and the data in the other is purely down to the whims of the chip. It is common to clock in a command or register location into the SDI pin and, on the next byte, the contents of that register is clocked out of the SDO pin.
So no, the input doesn't "fall over" into the output like a shift register.
If you want to reduce the number of CS pins used then you could use, say, a 74HC154 4-to-16 decoder to connect 15 devices to just 4 CS pins (reserve 1 pin for "no device selected").
If all your devices are shift registers, or operate like shift registers, and not real (register based) SPI devices, then you may be able to cascade them if they all work in the same way. That, of course, is not guaranteed unless they are all the same device.