Electronic – Comparator output not fully switching on MOSFET

This doesn't answer your question about the low gate voltage, but I want to explain the hysteresis I suggested in comment you might add.

Suppose the diode ladder creates a voltage difference of 10V, then the inverting comparator input is at 6.5V. Also let's start with the situation where the capacitor is fully charged to 16.5V, then the non-inverting input is at 0V. So output is low, FET doesn't conduct, and C1 is allowed to discharge through its load. When the voltage across C1 becomes 9.99V the non-inverting comparator input becomes 6.51V and the FET starts to conduct, so that C1 gets charged. This means \$V_{OUT}\$ will start to decrease, falling below 6.5V again and the FET will switch off again. Charging will stop, and C1 will again discharge until it reaches 6.51V again. Same things happen: FET switches on, \$V_{OUT}\$ will descrease and FET will switch off again. And so on.

That's the theory. I made my comment before I had seen your schematic, based on the description. Now since you charge C1 over a very low resistance its voltage may go pretty low before the FET switches off again, but things may also occur as described above.

What can you do about it? This is where the hysteresis comes in. Like I said you add part of the comparator's output voltage to the non-inverting input. Place a resistor between \$V_{OUT}\$ and the non-inverting input, and one between the output and the input. Now if the FET is off the output is low, and the resistors will form a divider, so that the non-inverting input sees only part of \$V_{OUT}\$. That's your comparison level. You'll have to adjust the reference voltage on the other input. Say that you're now comparing with +5V. OK, C1 discharges until it reaches 5.01V. Output becomes high and C1 starts to charge. Now this is important, via the resistor divider the high output will set the non-inverting input to a level much higher than the 5.01V. This means that the output will remain active for a longer time (C1 voltage has to charge all the way down to 5V). This will ensure that C1 gets fully charged via the FET's internal resistance, before the FET gets shut off again.

The comparator output will change states based upon when the signal voltage at the + input goes above or below the reference voltage on the - input. Selecting the reference voltage has everything to do with the nature of the input signal levels. The sample circuit you show sets the reference at 2.5 volts. So you would expect the output to reflect a high whenever the input signal voltage is above 2.5V and low when the signal voltage is below 2.5V.

From this explanation you should be able to extrapolate the behavior of the comparator if you adjust the reference relative to a known input signal.

Do be aware that the comparator will have a valid operating voltage range for its inputs so do be aware of this as you go about changing the voltage on the reference and the input signal pin.