Electronic – Compensation Loop of a mixed system

controlcontrol systemlaplace transformz transform

I have a system which is a mixed system. The system is an analog and numerical system. I modelized the analog part and I know its transfer function which I do not want to modify. The numerical part is used for doing the compensation of the system. I want to trick the compensation part.

Nevertheless for correctly design the compensation, and as I more used to think in the Laplace domain, I decided to study my whole system into the continuous domain. And I did the compensation that I wanted to have. But as my compensation is done by a numerical part, I need to convert my compensation transfer function from the continuous domain to the discrete domain. But as discrete transfer function is not equal to continuous transfer function, my compensation done in the continuous domain is probably not the right if I think correclty… especially because I have a very slow sampling rate and it cleary degrades the phase… Actually I should consider to add the effect of the discrete transfer into the s domain and then do the compensation.

My question is how can I do for adding the effect of the discrete transfer function into the s domain, considering a Euler Method for discretizing ?

More details :

The final system will be the following and the only part that can be changed is the compensation part :

enter image description here

Thank you very much and have a nice day,

For doing the compensation, I modelized the plant transfer function and the "feedback elements" transfer functions in the s domain. Then for having the margins that I wanted to have, I designed the transfer function of the compensation in the S domain as follow :

enter image description here

And then I pass my continuous transfer function to the z domain through the Euler method rather than than the bilinear transform as it it lowers the order of the transfer function and it then lowers the complexity of the code.

But It seems to me not the right solution as when I did the compensation in the s domain, i supposed no delay introduced by the software, so my system would be stable if my compensation introduced no delay. But when I set my system to the z domain I introduced a delay by setting the sampling rate, which in my case is 100 µs and the bandwith of the system is 5 KHz. I have some doubts … I should introduced a Pade approximation for taking into account the delay, isn't it ?

Best Answer

And then I pass my continuous transfer function to the z domain through the Euler method rather than than the bilinear transform as it it lowers the order of the transfer function and it then lowers the complexity of the code.

AFAIK, bi-linear transform doesn't increase the order of the system. See below example. Both transfer function denominators (not the numerator) are degree 3.

sys = tf([1, 1, 1], [1, 3, 3, 1])
           s^2 + s + 1
 y1:  ---------------------
      s^3 + 3 s^2 + 3 s + 1
Continuous-time model.

c2d(sys, 0.001, 'tustin')

      0.0004995 z^3 - 0.000499 z^2 - 0.0004995 z + 0.000499
 y1:  -----------------------------------------------------
                z^3 - 2.997 z^2 + 2.994 z - 0.997

Sampling time: 0.001 s
Discrete-time model.

i supposed no delay introduced by the software, so my system would be stable if my compensation introduced no delay.

The process of holding a sample at the input of the plant for one time period introduces an effective low pass filtering action. Which can be modelled in s-domain while doing the design.

From Wikipedia

The fact that practical digital-to-analog converters (DAC) do not output a sequence of dirac impulses, xs(t) (that, if ideally low-pass filtered, would result in the unique underlying bandlimited signal before sampling), but instead output a sequence of rectangular pulses, xZOH(t) (a piecewise constant function), means that there is an inherent effect of the ZOH on the effective frequency response of the DAC, resulting in a mild roll-off of gain at the higher frequencies ..

This drop is a consequence of the hold property of a conventional DAC, and is not due to the sample and hold that might precede a conventional analog-to-digital converter (ADC).

But when I set my system to the z domain I introduced a delay by setting the sampling rate, which in my case is 100 µs and the bandwith of the system is 5 KHz.

Bandwidth is 5kHz. the sampling frequency is 10kHz. You are right at the border of the sampling theorem. Try for at least 5x or 10x times 5kHz.

Related Topic