datasheetdc/dc converterltspicemosfet-driver
In the datasheet above LM3743. I have developed crude gate driver.
To verify the circuit i have connected filter circuit and given expected duty cycle for Vout =1.8V Vin= 3V.
Boost capacitor and diode is choosen from application circuit BOM.
Is there any other way to build this with these specification in LTSpice (I have used switches which causes delay during simulation ?
I'd go for a full H-bridge driving a transformer.
With a 24V supply you can drive nearly 48 Vp-p onto the primary and this reduces the secondary winding turns to a ratio that produces 600 Vp-p - then I'd use a fast bridge rectifier and smoothing to give a 300 V dc output.
Step up ratio would probably be about 14:1 and if you wanted to control the amplitude I'd consider feeding the H bridge from a decent efficiency Buck convertor. Maybe make the turns ratio 15:1 so that a 20V output from the buck would do the business - leave a little overhead for loads etc..
My main consideration is avoiding the secondary winding having too much self-capacitance and acting like a parallel tuned circuit. It should be quite a way off with this type of topology.
It's not going to be a small lump of ferrite and I'd use the best I can get my hands on such as 3F4 material from Ferroxcube - you should be able to get 300 watts from an E68 planar transformer. I'm getting 200 watts from a slightly smaller E58 - using two half cores rather than a half core and a plate.
Mine's running at about 600 kHz so I can use PCB tracks for the coils - a sandwich of PCBs does the trick for the primary (4 turns in total) - mine is 1:1 so it's the same PCBs on the output - yours will need thinking about as to whether you can get 60 turns at 1A from PCB. I think you should just about squeeze them in.
The reason the FET turns off so slowly is because you only have 2 kΩ pulling it high. Take a look at the datasheet for that FET. It should show you the actual and effective gate capacitance when switching. The relatively weak 2 kΩ pullup is working against that capacitance.
Here is a trick I sometimes use in this situation:
The double emitter follower is basically a impedance buffer. The current to charge and discharge the gate capacitance is handled by Q1 and Q2, so the signal at GATE can be much higher impedance and still switch the FET quickly. Note that this double emitter follower will loose 700 mV or so on each end. That is fine for a FET that switches over a 10 V gate range. It will still be "off" with 700 mV on the gate just as well as with 0. At the other end, its usually easy enough to drive GATE the extra 700 mV further than what you want to make sure shows up on the gate of Q3.
Best Answer
You'd be surprised to find out that there currently are some very good behavioural models for various switching controller ICs and they reduce to just what you have there. Also, I see you've avoided the pitfall of setting extremely low/high on/off resistances for the switches. So this deserves a 'well done'. However, there can be some improvements.
There are duplicate
.modelcards for the switches, so you can trim down some lines. But the cards only includevt, which makesvhto default to zero, which means changing betweenRonandRoffand vice-versa is done abruptly. These sudden changes are not very friendly convergent-wise, because the derivative around that point tends to get ugly, which can cause the simulator to cough "timestep too small" errors, or even slow down the simulation. The solution is simple enough: add hysteresis by settingvh<0, which will cause the transition between on-off states to be done smoothly. A good choice is chosingvtto be half the input voltage, andvh=-vt. You could uselevel=2, too, but that requires the drive to be a bit tricky, solevel=1does it in this case. For the cases where the datasheet specifies a maximum current for the output driver, you can also setIlimit, but forlevel=1it's an abrupt limit, as oppsed tolevel=2, when it's better recommended. Just don't forget that the driving needs to be much higher (orvtandvhset lower) so that it can come close enough to "saturation".Another cause for discontinuity is the
if()expression inB1andB3. It could be mitigated if a current source (bi,bi2) would be used, withRpar=1 Cpar=10p, for example. But it's also a bit of a waste since those two sources can be replaced by a single A-device, the[Digital]/buf, which has builtin complementary outputs, it's almost guaranteed to converge and, if set withtau=1n tripdt=1n, for example, can provide superior performance. You can also setvhighandvlow, but if you're driving the switches, it doesn't matter, since then the defaults will bevhigh=1 vlow=0and the VCSW can be set withvt=0.5 vh=-0.5. Also a bit of a waste isE1, particularly if you're usingbuf.The diodes you used are the default, ideal ones, and they can be a bit quirky, but they can be improved by setting
vfwdandvrev, together with the very convergent-friendlyepsilonandrevepsilon. For this case,.model d d ron=10m roff=10meg vfwd=0.45 vrev=1k epsilon=50m revepsilon=10mwould do just fine. Don't forget to add anti-parallel diodes across the drivers, too.One last minor thing: the source,
V4, doesn't seem to have its parasitics set, which means it's a stiff voltage source with internal resistance zero, which makesC2useless. Unless you setRserforV4, but then, if you're at it, you can eliminateC2and addCpar=22uto the source, too.So, all in all, what you've done will do, and quite nicely, while also fitting the saying "make things as simple as possible, but not simpler".