Electronic – DAC behaviour on reset / startup LPC1768

dacmbedmicrocontrollerpinsreset

I am programming a mbed LPC1768 for a constant current discharger. I plan to use the DAC output on the LPC1768 for setting the current in my discharge circuit.

edit: The trouble i am having is related to the voltage from the DAC during start and reset. I already made and tested the discharge circuit and it's NOT connected at the moment. At the moment i only have Rpulldown connected on the DAC and am viewing the DAC output on my scope.

schematic

simulate this circuit – Schematic created using CircuitLab

I noticed that under start and reset the uC DAC goes to around 2V for a very short time. I guess it goes to some state untill i define the output in my code, but im not sure of it. edit: how do people usually deal with this kind of problem?

In my circuit these 2V is equal to 20A of discharge current. I dont want this to happen!

I tried pulling the DAC down with a 1K resistor and it sure clamps the DAC on start (goes to around 50mV on reset), but it also pulls the analog voltage down from what its set at in my code. Also tried 12K but that was not enough to clamp the DAC.

I have some different solutions to this problem, but they all involve transistors or relays. I was thinking there must be a more elegant way to deal with a problem like this and i can't be the first to have such a problem.

Can you guys please give me some tips on how to solve this problem? Should the DAC behave like this or am i doing something wrong?

Many thanks in advance!

Edit: added schematic, cleared up some confusing text.

Edit: This is how i am currently dealing with this problem. Any problems doing it like this or is it acceptable? It works but to me it seems a bit like a cowboy solution 🙂

Base is held high by a pullup resistor and this closes the relay loading the DAC output with 1K and pulling it to gnd. When enable is pulled low in my code the relay opens ands the DAC funtions as supposed.

enter image description here

edit: some code i tried running. just cycles the DAC between 0 and 3.3V. When i push / hold the reset button the DAC exhibits the behavior im talking about.

#include "mbed.h"

AnalogOut out(p18);


int main()
{
    out = 0;
    while(1) 
    {
    out = 1;
    wait(1);
    out=0;
    wait(1);
    }
}

edit: added scope capture of glitch.

Only DAC output on start, no load attached:

Only DAC output on start, no load attached

With 10K across DAC:

With 10K across DAC

With 1K across DAC:

With 1K across DAC

1K across DAC, running a program that should toggle DAC between 0-3.3V. Goes to 3.3 with no / lighter load:

1K across DAC, running a program that should toggle DAC between 0-3.3V. Goes to 3.3 with no / lighter load.

Best Answer

During a reset, such as on power-up, your LPC1768 I/O ports will be configured as GPIOs in input mode. An LPC1768 I/O pin can output up to 3 uA of leakage current in this mode. When configured as a DAC, the same pin is specified as capable of driving a load resistance of 1 K or higher.

You don't specify your op-amp so let's assume that has an input leakage current of 2 uA. (You can readily find alternative op-amps with much less input leakage than this if yours is higher.)

This leakage current will be conducted to 0 V by your pull-down resistor and will produce a voltage drop across it, following V = IR. This voltage will drive your op-amp input during reset, until your software has configured your I/O for DAC operation, so the resistor voltage drop needs to be acceptably low. However, the resistor value should ideally be well above 1 K.

As an example, let's consider a resistor voltage of 20 mV. This corresponds to your op-amp driving 2 mA through your current regulator, assuming perfect accuracy there.

Then R = V/I = .02/0.000005 = 4000 ohms (a 3K9 resistor).

After reset, your software should configure the DAC while leaving the I/O pin in its initial state, as a GPIO input. Once the DAC is in the correct mode and set to zero, the GPIO can be configured as a DAC output. The I/O pin's optional pull-up resistor must not be used.

FURTHER FINDINGS...

From the LPC1768 user manual (UM10360), I didn't think the I/O pin pull-ups are enabled after reset. However, @Dorian has found information in the errata that states that they are.

Therefore, instead of the above, you can use an external defeat circuit to clamp the op-amp input to 0 V until the LPC1768 is stable and ready to drive its ADC output.

Choose a suitable logic-level FET for Q1 that is ON with a Vgs of 3 V or ideally down to Vgs of 2.7 V.

schematic

simulate this circuit – Schematic created using CircuitLab

On power-up, GPIO will be internally pulled high but it also pulled high by R2, which is added for certainty after the errata affair. Q2 will conduct and short R1 to deck, ensuring that the op-amp input is zero. Once your software is up and running, it first configures GPIO/DAC to be a DAC driving 0 V. It can then configure GPIO to be an output driving low, turning off Q2 and allowing the op-amp circuit to work normally.