Electronic – Dangers of analog levels on digital PIC inputs

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I'm intending to use a PIC16F675, because it's what I have laying around, for a very simple task that involves turning on or off LEDs in response to changes in a pair of photodiodes. It really could all be done with basic components, but I'd much rather spend my time writing Assembly than tuning transistors.

At any rate, the 16F675 does have an ADC, but I don't want to use that, because I want the chip to sleep and respond to "digital" interrupts instead. This would normally be pretty straightforward, just drop in a potentiometer and turn it until the chip sees a "high" value when the correct amount of light is hitting the photodiode.

However, the datasheet has a warning I've never seen before:

Analog levels on any pin that is defined as a digital input, may cause
the input buffer to consume more current than is specified.

This raises a few questions, most notably, what does this actually mean, and also why? According to the specs, 3V is well within its logic high range, but is this going to damage the chip by causing too much current draw? Or is it actually just a warning that the overall power consumption may go up compared to what the datasheet indicates? What if I instead wanted to connect a 3.3V digital output from another chip to it, would the same issue apply?

Best Answer

The input buffers on a microcontroller are complex circuits as they need to serve several purposes like input, output, analog I/O, built in pull up resistor etc.

However, when used as an input it can be seen as a standard CMOS inverter:

schematic

simulate this circuit – Schematic created using CircuitLab

As long as we apply a voltage at input that is low enough (like 0.5 V or less) then this input voltage is treated as a "0", the PMOS will be on and the NMOS will bo off. So no current flows (the "to MCU internal circuits" has a high impedance input, no current can flow into it) and all is well.

When we apply a voltage at input that is high enough (like between Vdd and Vdd -0.5 V) then this input voltage is treated as a "1", the NMOS will be on but the PMOS will be off. Again, no current flows.

However we would apply a voltage that is close to Vdd/2 then both the NMOS and the PMOS will conduct. Then a "cross current" will flow from Vdd to ground. This is the current that the datasheet is talking about.

If you do this on only one input the current will not be a problem (the MCU can handle that, it wil not be damaged) but the current will flow and that will drain your battery.

So you can do what you propose but it is not a power efficient solution and depending on the voltage at the input, your battery might drain faster than expected.

Possible solutions:

Use a low-power comparator to do the voltage level detecting, a comparator will also consume some current but you know how much that is going to be (see its datasheet) so you can check if that current is low enough. Then the comparator's output goes directly to the MCU's input.

If you can live with a small time delay, use "polling" instead of an interrupt. If programmed correctly an MCU can wake up every second and check the input and go back to sleep (for another second) when nothing is detected and that could still result in a very low average battery current. I once made a gadget using an MCU which wakes up briefly every 8 seconds and it lasts years on a set of AA alkaline batteries.