Electronic – DC analysis of common source MOSFET circuits to find gate voltage using different power supplies

You have to replace the FET with its small-signal model. When the devices are in saturation (as they should be in a CS amplifier), the equation that describes the drain current of a FET with respect to its gate source voltage is

$$ I_{D} = \beta \frac{W}{L}(V_{gs}-V_{T})^2 $$

where \$\beta\$ is the FET's transconductance (a parameter calculated from the mobility of its carriers and the oxide capacitance) \$V_{gs}\$ is the FET's gate source voltage and \$V_{T}\$ is its threshold voltage. That equation is non-linear and hard to solve, so for "small" AC signals we choose a "large signal" DC operating point and linearise the equation at that point by differentiating it with respect to \$V_{gs}\$ to give the small signal transconductance \$g_{m}\$. Similarly, the FET's channel resistance can be found by differentiating \$V_{ds}\$ with respect to \$I_{D}\$. That allows you to derive the small signal model below.

^{simulate this circuit – Schematic created using CircuitLab}

Replace the FETs in the slide with that, and you can analyse the circuit (note that a lot of second order effects like channel length modulation, body effect etc. are left out of this explanation).

The lower FET has both its gate and source at AC ground, so the complete small signal model is as below, and you can see how the gain is derived.

^{simulate this circuit}

If the bottom "driver" transistor is turned off, the output will just be disconnected from ground - it will not be high unless something, somewhere, pulls it high, and the load resistor or upper transistor will do this.

There are "open collector" or "open drain" gates that do omit the internal load, but when you use them, you have to add an external load, or depend on something else in the circuit to pull the output up.