Let's consider an op-amp:
The book I'm reading says that, ideally, if the voltage difference between the two inputs is zero (thus vin1=vin2) then the output voltage should be zero. However, because of mismatches in the circuit implementation at the transistor level, even if the input differential input is zero, the output will be different from zero. Thus a voltage, called the offset voltage, must be applied between the two inputs in order to really set the output voltage to zero.
Another book I'm reading considers the following fully differential circuit:
Ideally, if v1=v2, then the output differential voltage vo is zero. In reality however vo is not zero because of mismatches; the book calculates then the value of the offset in order to have the differential output voltage equal to zero.
In every case, the author of the book is consistent with the definition of offset voltage: he wants to set the output differential voltage to zero, accordingly to the definition
Question: if I have a single-ended output voltage, how do we define the offset voltage? Let's consider the following two-stages op-amp:
If I rigorously apply the definition of the offset voltage, I should find that voltage which, applied between the two inputs, sets the voltage of the output node to zero. But this would be meaningless: I must indeed have necessarily a dc voltage different from zero at the output node, otherwise the circuit for sure will not work!
Best Answer
For a lot of cheap op-amps, the offset voltage and the voltage amplification ratio are both high enough that the range of differential voltages that keep the output in the linear region is dominated by the offset voltage.
For any decent datasheet* the test conditions will be detailed; i.e., they will tell you what the output voltage was, and possibly the input common mode voltage (see, e.g., TI's LM324 and TI's LF353).
* In the "only true Scottsman" sense.