I am looking into electrolysis efficiency using an auto-locking PLL circuit that is supposed to latch onto the resonant frequency of the electrolysis cell, a frequency determined by the inductance of the bifilar coil and the capacitance of the cell containing distilled water.
To that end I have acquired a circuit for which I have assembled and built a PCB design (attached) and, to help me understand how it works have also drawn up a flow chart (attached) showing the logic of its operation.
So far I have been unable to get the PLL to lock and so I wanted to check that the circuit is correct based on the functional diagram of the HEF4046B chip (also attached). In reading the datasheet and how the PLL works, it uses two types of comparator and I think my circuit is using comparator 1 and yet the output of comparator 2 (Pin 13) is also used.
My query is, whether this circuit is right to do the job.
For example, I was wondering if instead of PLL output Pin 13 being fed back to its Pin 9, via the NOR gates and Switch, Pin 1 should be instead?
I hope this is not too complicated a question but to someone familiar with this type of chip and circuit I think it will make sense.
Thanks
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