The problem
I need to reliably generate a sequence of events based on a digital input trigger signal. With minimal jitter and a predictable deterministic delay.
- 2 to 5 events
- The events will be from 10µs to 10ms apart. Better than 5% timing precision, preferably +-2us.
- Jitter of <100ns
- Jitter must be randomly distributed, no deterministic patterns
- The trigger can be as fast as 50kHz or as slow as 0.1Hz
- Digital configuration interface (via SPI)
Due to regulatory complexity this design will have to be as analog as possible, with perhaps some fixed (non-programmable) logic.
Possible solution path
The solution path that I currently envision is with purely analog monostable multivibrators driven by DACs that set the oscillator currents and some configuration logic. Being analog, any imperfections will be influenced by gaussian noise, thus solving the random distribution of jitter.
But this clearly presents some difficulties due to the three decades of required timing adjustability. Which led me to this question.
The question
Is it possible to design a crystal (or similarly precise) oscillator that has a deterministic and predictable startup transient?
Clearly a crystal oscillator would considerably simplify timings, as it would make possible replacing the monostables with counters. However a fixed oscillator would make the jitter deterministic, as it will be determined by the beat frequency between the trigger source (a processor) and the oscillator. This will cause problems with the averaging of captured evoked signals.
A crystal oscillator that can be deterministically and repeatably started on demand would greatly simplify the problem.
The basic idea
The first idea that came to mind is something as simple as this circuit:
simulate this circuit – Schematic created using CircuitLab
However, crystal oscillators have rather chaotic and unpredictable startup transients that last a long time (which I would assume is due to slow mechanical effects). So this won't work.
Is there a way to achieve this?
Best Answer
While crystal frequency stability is nice, only high overclocking will achieve low 'jitter', because powering down the crystal takes many cycles (like, thousands); the high Q of a crystal makes it unsuitable for start/stop operation. High enough crystal frequency (low period time), means the one-cycle response uncertainty to an asynchroous trigger might be acceptable.
Monostables are generally not adjustable over the microseconds-to-milliseconds range. Counters, though, are.
Consider a startable oscillator that comprises an inverting gate feeding a delay line (a foot of CAT-5 wire, four pairs in series, has circa five nanoseconds of delay), would make a low-jitter startable clock, and some programmable counters can generate the events.
simulate this circuit – Schematic created using CircuitLab
Turning the clock off, and waiting for the next trigger, would be the last 'event', and requires only a few cycle times to clear the delay line (damp the reflections in the delay line with its termination resistor).
The hypothetical 5-ns delay line would generate a 100 MHz clock, but that can be divided down to something slower, without compromising phase and timing repeatability.