Digital Logic Diodes Protection GPIO Input – Digital Input Clamp Circuit Protection


To be able to connect some peripheral to digital input, I'm designing the circuit protection to avoid any possible failure due to over/under-voltage issue. So, I will add a clamp protection circuit.
The requirements I need to accomplish are:

  • Power Source (Vcc): 3V3
  • Max Voltage: 3V9 (3V3 + 0V6)
  • Min Voltage: -0V3 (GND – 0V3)
  • Max Logic input current: +/- 300nA

The circuit is next:
Clamp Circuit

R1000 is added to limit the current to 10mA.
R1001 is added to limit the input current below 300nA.

My doubts are:

  • Might the circuit be modified in case it need to support up to 30V input?
  • Which would be the best option for both diodes (Forward voltage, breakdown voltage, forward current, etc)?
  • As digital inputs may need to produce a rising interrupt, will be better to add a schottky instead of a zener on D1000?

Best Answer

This is all you need:


simulate this circuit – Schematic created using CircuitLab

this also eliminates the problem that a high voltage at the input will lift-up your local VCC.

When input < -0.6 V D1 will conduct and limit GPIO to -0.6 V, R2 limits the current, your GPIO input will be able to handle this (it also has input protection diodes !)

When input > -0.6 V but < 3.9 V D1 does nothing, GPIO also happy

When input > 3.9 V D1 will conduct, R2 will limit any current, GPIO input will be happy.

Someone complained this would not work but was too lazy to explain why but I figured it out myself:

Apparently I overlooked that 3.9 V zenerdiodes leak a lot in reverse so I lowered R1 to 10 kohm. If that still doesn't fix it than you could replace the zenerdiode with 4 to 5 standard diodes in series, see 2nd schematic.