For example, this TI PHY chip DP83630 has two MAC addresses that can be used as destination and source MAC addresses for PHY control frames. (page 72 and 94)
Does this means all PHY chips will have the same MAC or am I missing something?
Electronic – Do all PHY Ethernet chips have a hard-coded MAC address
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The IC you mentioned (Vitesse VSC8221) is a typical 10/100/1000BASE-T/TX/T PHY with a 1000BASE-X/SGMII interface to the MAC. It is intended to design SFP modules, not to design media converters.
As i see you try to design a converter for 10/100/1000 Mbps copper to/from 1000 Mbps fiber optic. If it is so, you should use a switch instead of simple PHYs, because you need a speed matching mechanism (packet buffering memory) as the basis for "store-and-forward" concept.
The PHY you selected has no packet buffering memory and works like a "pass-thru" block: speeds on both its sides must be equal. It also does not manage CDMA/CD to deal with half duplex connections itself. It's only PHY and it needs a MAC over it.
Search for appropriate 2-port switch IC (often called "converter") with integrated PHYs (one is 10/100/1000 copper and one is 1000BASE-X serdes for fiber optic) for your task. Good luck.
Since OP has not mentioned the PHY being used, taking Micrel KSZ8021RNL/8031RNL as an example.Please look at the electrical specifications of the PHY
. You can see the differential output measured after 1:1 transfer lies between min. 0.95V to max. 1.05V, which is not the -ive voltage. For more details of the PHY electrical specification you can look page #33 onwards of KSZ821RNL datasheet.
With this I just wanted to highlight that differential signal need not always swing between positive to negative voltage. It can swing between more positive(say 3.0V) to less positive( say 1.0V), this will also be considered as differential signal.
For the basics of differential signalling you can look into app note from Lattice semiconductor, which also talks about advantages of differential signalling.
There can be many more levels for LVDS as shown below:
. The image source is Analog Devices application note AN-1177. And this also talks about multipoint LVDS.
Now coming to MAXIM MAX4890/MAX4891/MAX4892 LAN switch, you can easily use this switching between two ethernet RJ45 to a single PHY, as it shown as an example circuit page #39 of the switch datasheet, image for reference below:
As a suggestion just make sure both your PHY and this LAN switch operate on the same voltage. And make sure to have a closer look at their logic levels as well.
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These addresses are used for PHY CONTROL frames only, not for normal data frames. As far as I understand such frames they are not destined for a particular node. I suspect that the actual address is unimportant, and the choice of two addresses is only for debugging and testing (so you can see from which of two sides a frame is sent).