Electronic – Do multi-core processors reduce power consumption

multicorepower-consumptionprocessor

I have been reading some tutorials about power consumption on parallelized system. I have been following this tutorial.

Tim Mattson (Intel): Introduction to OpenMP: 02 part 1 Module 1, YouTube

At about 3:50 min of this tutorial, the mentor mentions that.

lets say if I have a processor that operates at frequency f.

The output power is

$$ CV^2f $$

where V is the voltage, and C is the capacitance.

If we have the two processors that operate on the frequency f/2, and they are connected in parallel. Then total output power will be P1 + P2. And for each of the processor, voltage will be V (they are in parallel). And the Capacitance will be 2C (C1+C2) for parallel.

So total power will again be

$$ P = P1 + P2 = 2( CV^2 f/2) $$

which will again be equal to

$$ CV^2f. $$

But the mentor mentions that the power consumption will be decreased to 40%.

Can anybody explain? Do multi-core processors reduce the power consumption by such a high value?

Best Answer

According to the video starting at 5:05 it's not, as you write

$$ P = P1 + P2 = 2 ( C V^2 f/2 ) $$

but

$$ P_{reduced} = 2.2 C ⋅ (0.6 V)^2 ⋅ f/2 $$

$$ = 2.2C ⋅ 0.36 V^2 ⋅ f/2 $$

$$ = (2.2 ⋅ 0.36 ⋅ 0.5) CV^2f $$

$$ = 0.396CV^2f. $$

The drastic power decrease to 40 % is caused by the decrease of the voltage to 60 % where V appears at V² in the power formula derived in the video before:

$$ P = C V^2 f .$$

Note: The dark yellow lines in the image shown in the video represent data flow, not (parallel wired) power supply.

Tim Mattson says at 5:14:

[...] frequency scales with voltage, but you know [leakage...], so let's say the voltage goes not half, lets say it goes to .6.

From Dynamic frequency scaling:

Dynamic frequency scaling (also known as CPU throttling) is a technique in computer architecture whereby the frequency of a microprocessor can be automatically adjusted "on the fly", either to conserve power or to reduce the amount of heat generated by the chip.

...

Dynamic voltage scaling is another power conservation technique that is often used in conjunction with frequency scaling, as the frequency that a chip may run at is related to the operating voltage.

[Last emphasis by me.]

From Dynamic voltage scaling:

Dynamic voltage scaling is a power management technique in computer architecture, where the voltage used in a component is increased or decreased, depending upon circumstances.

...

Undervolting is done in order to conserve power, [...]

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