Electronic – Does a Guard Ring around a PLL loop filter make sense

A guard ring is traditionally used to protect high impedance nodes in a circuit from surface leakage currents. The guard ring is a ring of copper driven by a low-impedance source to the same voltage as the high impedance node. This would typically be the input pin of an op-amp.

Here's an example of a classic guard ring layout for a metal can op-amp from National Semi's AN-241:

And here's an example of how it would be connected, from Analog's Analog Dialogue magazine:

The key feature is that the guard ring is connected to a node that will be driven to the same voltage as the high impedance node being protected, but with a much lower source impedance.

Note that not all vendor websites are created equal. Microchip's AN1258 recommends using the high-impedance net to create a guard ring around the low impedance nets --- don't do this.

Now to your specific case. While the undriven side of your capacitor is not strictly a low-impedance node, since the ammeter itself should provide a fairly low impedance path to ground when you're measuring, it's still going to cause measurement errors if any current should try to reach ground through that node instead of by another path. It wouldn't hurt to add a ring around the node like this:

Unlike in another answer, I wouldn't include the driven side of the capacitor within the ring, since that's a low impedance node, being driven to a fairly high voltage. However, you've indicated the net in question isn't even physically located on the PCB, so this advice is largely moot. Being as the high impedance net is basically floating in air, it should be well-protected from leakages in any case.

A guard ring is supposed to be at the same electrical potential as the input it is guarding. This reduces leakage from that node. In its simplest form it is just a same-potential ring around the sensitive node, but it can also be a driven ring and/or trace via a separate unity gain buffer.

The purpose is to not have any voltage difference (or at least to minimize it) from the protected net or node to anywhere else, and thus no path for leakage.

Using a ground plane as a guard ring is downright stupid and clearly shows that your PCB designer doesn't know what he is doing, as the ground plane is the exact thing you don't want near the sensitive node. When I am designing a PCB with guarded nodes, I often cut-out and pull back any planes under the sensitive node(s) and also pull back the solder mask too. You want nothing there but the guard ring.

Furthermore, you need to consider the trace to the guarded pin as well. Which, by the way, you have backwards on your screen-capture of the PCB ... The trace entering from the left on your diagram is from the sensor and is going to the V_in+ pin, not V_in- as you have indicated. The V_in- should wrap around V_in+. That long input trace coming from the left side should be guarded as well, or come up with a way that gets the input signal to the V_in+ pin without going across the board like that. At the very least, the ground plane around that trace should be pulled back considerably.