Electronic – Effect of capacitor size on output voltage of a rectifier circuit

capacitorcircuit analysiscircuit-designrectifier

I have been analysing a half-wave rectifier circuit, in which a smoothing capacitor is used to filter the undulations present. I have experimented with different capacitor sizes on Multisim.

I thought what I've found was strange. I have searched the internet and tried coming up with explanations, but somehow I can't and would greatly appreciate some help.

Observations (using a 5 V peak AC signal input):

  1. If I leave the resistor fixed at 1 kΩ, and I used a 1 uF capacitor, I get a sawtooth shape graph (expected) with a decent sized ripple and the peak voltage of the ripple is 4.4 V.

  2. If I increased the capacitor size to 100 uF and leave the resistor fixed, I get a smoother (more DC-like) voltage. However the value of this smoother DC is now 4.1 V, which I find strange. Shouldn't this DC voltage be exactly the same as the 4.4 V peak that was obtained using the 1 uF capacitor?

  3. What I noticed also is that the bigger the capacitor size, the longer it took for the voltage to stabilise. Meaning that, for the 100 uF cap, it took approximately 40 ms for the voltage to rise and stay fixed at 4.1 V, unlike with the 1 uF cap which immediately produced a constant waveform at the turn on.

I'm wondering if the capacitor size has any effect on the response of the circuit.

I can't seem to find any explanation for this phenomena.

Best Answer

The only time-window in which the capacitor can receive charge is when the AC voltage is positive and, is slightly higher in amplitude than the capacitor voltage. Only then can current pass through the diode.

If you have a small value capacitor (1uF say), it gets discharged by the load more easily and, when that capacitor gets recharged, that time-window begins earlier on in the positive AC waveform hence, the smaller value capacitor has the luxury of being charged for longer compared a larger value capacitor. Once the AC voltage has reached a positive peak charging is restrained because the diode rapidly gets reversed biased: -

enter image description here

  • Red is the AC waveform peaking at 5 volts
  • Blue is the rectified output slightly smoothed by a 1 uF capacitor (4.384 volts)
  • Green is the current through the diode peaking at 4.623 mA

For the same load resistor, the larger value capacitor (100 uF) hardly gets discharged (as expected) and hence, the time-window in which it can receive charge begins much later in the AC waveform and therefore, has to have a much shorter duration: -

enter image description here

  • The current (green) peaks at 69.5 mA and of course this level of current causes the diode to drop more voltage. Also notice how the time-window for recharging the capcitor has become much smaller.
  • Blue (due to the diode drop) peaks at 4.347 volts (previously 4.384 volts) i.e. 30 mV less.

My simulation uses a 1N4003 diode and other diodes can produce greater volt drops under heavier load (the OP talks about 4.4 volts dropping to 4.1 volts).

So, as said, during that diminished charge period, the demand for current to recharge the bigger capacitor is significantly greater and that produces a larger volt drop across the diode and voltage is lost. In other words it can never attain the same peak DC value due to diode losses.

This shortened time-window in which the larger capacitor receives charge also accounts for the extended length of time that it requires to reach full charge (apart from the fact that bigger capacitors take longer to charge from a limited or restricted energy source anyway).