Electronic – Emitter follower voltage regulator misbehaving

emitter-followervoltage-regulator

To make a crude voltage regulator, I've made a simple emitter follower using a BD139 transistor. When the 0.5A load is connected, the circuit behaves as expected: the voltage across the load sits at about 0.8V below the voltage at the base. However, if I increase the load impedance, or disconnect the load, the output voltage rises to equal the voltage at the base. That's a problem, because I want the output voltage to be constant despite variations in output current. Any ideas, please?

Best Answer

An emitter-follower operates on the principal that the base-emitter voltage of a forward biased transistor is approximately equal to 0.6 or 0.7 V. So for some input voltage on the base, the emitter tracks the input minus one diode drop. $$ V_O = V_I - V_{BE} $$

Of course this is just the shorthand approximation, the actual base-emitter voltage is given by:

$$ I_C = I_S \exp \left( {\dfrac{V_{BE}}{V_T}}\right)$$

A sample IV plot is the following,

Note the scale on the x-axis is in 60 mV graduations to illustrate a common rule of thumb for transistors. Every 10x increase in collector current is a 60 mV increase in base-emitter voltage near room temperature.

To answer your first question of,

However, if I increase the load impedance, or disconnect the load, the output voltage rises to equal the voltage at the base.

Looking at the sample IV plot, you can see that when you have zero load current, the base-emitter forward voltage is also ~ 0 VDC. So Vbe = 0, i.e. the base voltage equals the emitter voltage.

As a simple shorthand approximation, if you load the output with 1/10 your max rated current, you will achieve 60 mV of load regulation. A restive load at 1/10 rated current is a simple solution.

Impedance Transformation

When the transistor is operating in active mode (Vcb>0), the transistor also provides an impedance transformation of the source resistance by \$1/\beta\$. A sample schematic of a common-emitter buffer amplifier:

schematic

^{simulate this circuit – Schematic created using CircuitLab}

From standard transistor theory, you are aware that \$ I_C = \beta I_B \$. So, as you begin to load the output of Q1, \$ 1/\beta \$ of the load current is sourced through the base. As a result of having a finite source resistance from your reference, the voltage right at the base terminal of Q1 droops by \$ I_B * R_S \$.

As a practical example assume RS = 10 ohms and \$ \beta \$ = 100, the output appears as having an output resistance of $$ R_o = \dfrac{R_S}{\beta} = 0.1 \textrm{ Ohms} $$

Your goal here is to keep the source resistance small enough so the the output voltage only depends on the IV curve of your transistor.

Summary

The three most important design choices to make are

RE, for minimum load current
Rs, lower for lower Ro
beta of Q1, must have good beta over the full load range

Asides

For DC don't worry about the 1/gm you see in typical amplifier notes, its just a linearization of the Ic-Vbe curve (unless you care about its ac output impedance) just look at the IV curve
There is also thermal design to consider, Vbe, as rule of thumb has tempCo of -2mv/deg. This does work in your favor as you pull more load current the transistor heats up and thermally pulls Vbe back up

Related Solutions

Electronic – Emitter Follower Output

You need to connect R2 to a negative supply voltage with enough headroom for your signal, or bias the input waveform so that it doesn't clip.

The output voltage an emitter-follower is usually V_out = V_in - 0.7V, but there are bounds on where this function works. For the expected behavior, VCC + 0.7V > V_in > VEE + 0.7V must be maintained, where VEE is your negative supply. In your case, VEE is equal to 0V since you don't have a negative supply. When your input voltage swings below 0.7V, the transistor turns off, and your output stays at the negative voltage rail.

Modify these lines to add in a negative power supply.

R2  4 5 3.3k
Vee 0 5 DC 15

Modify this line to bias the sine wave for the existing circuit.

Vin 1 0 SIN(7.5 5 60) dc 0

Electronic – Designing a stiff voltage source using an emitter follower

Here's an overview of the design process to get you started. I'll let you work out the exact calculations.

I would replace \$R_{\text{load}}\$ with an independent current source \$I_{\text{load}}\$ for your simulation (you can use your CircuitLab schematic for simulation once you add resistor values). Set \$I_{\text{load}} = 25\$mA since that is your worst case.

Pick a relatively large emitter resistor \$R_3\$. This simply provides a load to the transistor if the actual load isn't connected (e.g. \$I_{\text{load}} = 0\$). For example, use \$R_3 = 10\$k\$\Omega\$. If \$V_{\text{out}} = 5\$V then the current through \$R_3\$ is \$0.5\$mA and \$I_{E} \approx 25.5\$mA in the worst case (\$I_{\text{load}} = 25\$mA).

Next you need to determine the worst case (highest) \$I_B\$. Use the lowest \$\beta\$ in the transistor's datasheet (worst case) and then calculate

$$I_B = \frac{I_E}{\beta + 1}$$

Now in order to make the resistor voltage divider "stiff" you need to make sure that the unloaded bias current through the resistors (call it \$I_{\text{div}}\$) is at least 10 times the load current (in this case \$I_B\$ is the load for the voltage divider). Otherwise the load current draws too much current away from \$R_{2}\$, which causes the voltage at the output of the voltage divider decrease too much. This puts a constraint on the maximum value of \$R_1 + R_2\$ since

$$I_{\text{div}} = \frac{15}{R_1 + R_2} > 10I_B$$

This equation plus the voltage divider equation

$$\frac{R_2}{R_1+R_2}15 = 5.6$$

gives you two equations and two unknowns.

Best Answer

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Electronic – Emitter Follower Output

Electronic – Designing a stiff voltage source using an emitter follower

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