I see many things that could potentially cause the eye diagram issues that you see. No "smoking gun", but some things that could potentially mess things up.
You have 0.01 uF caps (C211, C212, C214, & C217) on the unused pins of the RJ-45 and the center taps of the transformer. I recommend shorting out those caps. Your use of caps here is unusual and could cause issues later on, although they are unlikely to be causing the eye-diagram issues you're having. Near as I can tell, the only reason to have these caps is as a DC-Blocking scheme for when someone is using a non-standard power over Ethernet scheme. Standard POE doesn't need this protection, and since the POE standard is now "old" you are unlikely to encounter non-POE standard equipment.
Remove C19 and C25, 10 pF caps on the Ethernet termination resistors. These are way too small, and too far away from anything critical to be of any use.
Change C18 and C24, 0.01 uF caps on the Ethernet termination resistors, to at least 0.1 uF. You could even try 4.7 uF. The "power rail" that these caps are decoupling needs to be fairly stable, and there could be a surprising amount of current flowing through the termination resistors. If L4/L5 is restricting current flow too much, and the caps aren't taking up the slack, then you could have data errors.
Remove C16, C17, C22, and C23-- all 10 pF caps on the Ethernet data lines. The only reason for these is EMI filtering and are not needed for debugging. Remove them to make sure they are not causing other issues. You can always put them back later if you need to.
Change C20 and C21, 0.022 uF caps on the transformer center taps, to at least 0.1 uF. 1.0 uF might be good to try as well. This line might be drooping too much given the 10 ohm resistor and L4/L5. You could even short this to VCC for debugging. The only reason for the resistor (and to a lesser extent the cap) is for EMI filtering. When you re-spin the PCB, you should connect the 10 ohm resistors directly to VDD33 instead of going through L4/L5. The 10 ohm resistor and L4/L5 are redundant. By going direct to VDD33 you can prevent injecting noise into your termination resistors and also makes optimizing the filtering in this area easier.
You'll need more caps on the VDDIO pin, or short out the bead. This pin is providing power to lots of I/O pins and will have a lot of current on it. If it is current starved because of the LC filter (bead + 0.4 uF) then you'll have lots of simultaneous switching noise on the I/O pins. That'll actually cause more noise than what you're filtering out with that bead. It's even possible for this noise to make it to the Ethernet outputs.
Verify that you have the pin-outs on your transformer correct. While unlikely, it's possible to have the center tap and another pin swapped. It's worth spending 5 minutes verifying things. For that matter, verify the pin-outs of the LAN8700 as well.
If none of that improves things, then get a 25 MHz metal can oscillator and replace your crystal. I've seen crystal circuits do weird things, so if only for the peace of mind it's worth hacking up your prototype board to make sure your clk is stable.
That's all I see at the moment. Hope this helps!
Half-duplex base-T Ethernet does not mean that the same wires are used for both directions of transmission, only that the two ends cannot transmit simultaneously.
Full-duplex means that both ends can transmit and receive at the same time, which only became possible with the shift from the shared coaxial cable to point-to-point unshielded twisted pair cabling.
There are never any physical collisions with base-T Ethernet, only "logical" collisions within a hub or switch. Even with Gigabit Ethernet, in which all four pairs are used in both directions simultaneously, each end uses a "digital hybrid" to separate incoming data from outgoing data on each pair.
Best Answer
Receive synchronization should not be required to transmit data. However, in some cases the transmit chain is disabled at some point if there is no signal on the receive side. What are you putting the transceiver in? NIC? Switch? Custom device of some sort? I have some experience with running SFP+ modules unidirectionally for various photonics experiments. Generally, the SFP+ module and PHY are no problem, it's at the MAC layer or higher that you can get trouble if there is no receive signal. The technique I used with standard 10G NICs was to loop the transmit side back to the receive side of the same module with an optical tap, either a 90/10 tap or I think a 98/2 tap. With driver modifications to mask the link status from the operating system, it was generally possible to run without the loopback, at least for the specific NIC that we were using. I presume this should work for your application as well. However, if you have control over the MAC higher layers and you can configure them to ignore the receive side status, then this may not be required. I have had no issues with running SFP+ modules transmit-only with no receive connection out of an FPGA board.
You may just need to do some experimenting; gigabit NICs and SFP transceivers are rather cheap second-hand.