Your description is correct: given that \$V_{GS}>V_T\$, if we apply a Drain-to-Source voltage of magnitude \$V_{SAT}=V_{GS}-V_{T}\$ or higher, the channel will pinch-off.
I'll try to explain what happens there. I'm assuming n-type MOSFET in the examples, but the explanations also hold for p-type MOSFET (with some adjustments, of course).
The reason for pinch-off:
Think about the electric potential along the channel: it equals \$V_S\$ near the Source; it equals \$V_D\$ near the Drain. Recall also that potential function is continuous. The immediate conclusion from the above two statements is that potential changes continuously form \$V_S\$ to \$V_D\$ along the channel (let me be non-formal and use terms "potential" and "voltage" interchangeably).
Now, let's see how the above conclusion affects the charge in the inversion layer. Recall that this charge is accumulated under the Gate due to Gate-to-Substrate voltage (yes, Substrate, not Source. The reason we usually use \$V_{GS}\$ in our calculations is because we assume that the Substrate and the Source are connected to the same potential). Now, if the potential change along the channel when we apply \$V_{DS}\$, the Gate-to-Substrate voltage also change along the channel, which means that the induced charge density will vary along the channel.
When we apply \$V_{SAT}=V_{GS}-V_{T}\$ to the Drain, the effective Gate-to-Substrate voltage near the Drain will become: \$V_{eff}=V_{GS}-V_{SAT}=V_T\$. It means that near the Drain the Gate-to-Substrate voltage is just enough to form the inversion layer. Any higher potential applied to Darin will cause this voltage to reduce below the Threshold voltage and the channel will not be formed - pinch-off occurs.
What happens between the pinch-off point and the Drain:
The Gate-to-Substrate voltage in this region is not enough for a formation of the inversion layer, therefore this region is only depleted (as opposed to inverted). While depletion region lacks mobile carriers, there is no restriction on current flow through it: if a carrier enters the depletion region from one side, and there is an electric field across the region - this carrier will be dragged by the field. In addition, carriers which enter this depletion region have initial speed.
All the above is true as long as the carriers in question will not recombine in the depletion region. In n-type MOSFET the depletion region lacks p-type carriers, but the current consist of n-type carriers - this means that the probability for recombination of these carriers is very low (and may be neglected for any practical purpose).
Conclusion: charge carriers which enter this depletion region will be accelerated by the field across this region and will eventually reach the drain. It is usually the case that the resistivity of this region may be completely neglected (the physical reason for this is quite complex - this discussion is more appropriate for physics forum).
Hope this helps
It is conventional to draw circuits so signals flow from left to right, like so:
simulate this circuit β Schematic created using CircuitLab
(You need a base resistor, R3, to limit base current, and a resistor from base to ground to ensure that the transistor does turn off when the switch is open)
With the switch open, the base will be held at ground by R4, so no current will flow through the transistor, so the collector will rise to a voltage determined by R1, R2, and the 2 volts or so voltage drop in the LED - this will allow current to flow through the LED and light it.
With the switch closed, the base will be pulled up, allowing current to flow through the transistor. If the resistors are selected correctly the transistor will be saturated, pulling the collector down to about 0.2 volts. As the LED requires about 2 volts across it, it will not pass any current.
I really dislike the sentence "Current always takes the path of least resistance", as many beginners seem to read it as "Current takes only the path of least resistance". In face, an electric current takes all possible paths, withthe lower resistance paths passing higher currents than the higher resistance paths.
Best Answer
The disconneced gate pin acts as an antenna, and will pick up some electromagnetic noise from the environment - likely the 50 or 60 Hz from the nearest wall power lines.
The end result is largely random, and there are other effects like leakage currents to account for.
Thats why you want a pullup or pulldown resistor in cases where the gate of a MOSFet could otherwise be "open" - so your circuit is kept in a known state.