Electronic – How does multimaster I2C work and its significance

Typically, an I2C slave device will work with any master which is no faster than what it is expecting. In some cases there may be problems if the master is too slow, but those are generally only an issue if the master is really slow (e.g. taking multiple seconds to do something which would normally take under a millisecond). Generally, the I2C spec says that for something to be a proper I2C slave it must be able to accommodate a certain speed, and that masters are entitled to assume that I2C devices will be able to either accommodate that speeds or add handshaking to tell the master to slow down.

Any typical off-the-shelf I2C slave should conform to the minimum standards for its specified speed, and any typical off-the-shelf device acting as an I2C master should work with any device that conforms to the standards associated with its specified speed. Microcontrollers programmed to act as I2C slaves may not always conform to expected timings (their ability to do so depends in large measure on the firmware installed), but most other slave devices shouldn't pose any problem.

Not sure if I understand your question but... The dashed lines in your diagram means, more of the same for some time.. like the gap in SCL between 2 and 7 is dashed to mean there are bits 3, 4, 5, and 6 which repeat the same pattern as 1, and 2.

The reason for double lines.. the upper line is for a 1 and the lower is 0, they both are shown as either is valid. For example when SCL transitions at bit 7 in the diagram SDA could be either a 1 or a 0 depending on what you are sending. But.. it must be either a 1 or a 0. Elsewhere where you see the lines crossing, that indicates the signals can be undefined, the state is not determined. This allows time for I/O lines to change.

note that SDA is the data, which is clocked into the part using SCL. SDA must be at 0 or 1 state some time before the clock transition, this is called the setup time. It should also remain in that state for some time after the SCL transition, called the hold time.