Electronic – How does this power inverter circuit work

powerschematics

I'm looking for a power inverter for a DC voltage and I found this circuit on Wikipedia (I'm asking about the one on the bottom; ignore the one on top because it's the electromechanical equivalent of the one below.). I don't understand how it could possibly work, though. Isn't the negative terminal of the voltage source connected to the P-junctions, making reverse-biased connections to both transistors? And if that's the case, how do we get any current flow, much less a switch?

Wikipedia article's power inverter circuit

Here is the Wikipedia article that I found the circuit on.

Best Answer

The emitter is negative (usually 0V gnd) relative to the collector which pulls coil current from a common V+ in either direction.

This primitive drawing uses NPN to create a "Push-Pull" free-running Oscillator determined by the LC characteristics of the transformer. The outer primary coils sample the drive current and polarity is such with delay that it becomes a positive feedback loop or AC coupled pulses to drive the base and maintain oscillation as a quasi-square wave with cross-over deadtime.

Since the core is shared , each NPN takes turns in driving the flux in opposite directions and the turns ratio uses the individual winding turns not the sum of both for voltage ratio from an effective conversion from dc to ac of;

Vcc=Vp-p + min. losses.

It is more common now to use MOSFET's and a controlled complementary gate signals with a defined dead-time to prevent shoot-thru across Vcc but this method guarantees a dead time but deadtime determined by slew rates then use optical feedback to control the clocks with precise controls on either skipped pulses for low power use or increase clock speeds or PFM for boost control or PWM for buck control.

For more SMPS topologies , read here. http://www.onsemi.com/pub_link/Collateral/SMPSRM-D.PDF

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