Electronic – How to automatically allocate a page of flash for in-application storage of settings

ccortex-m0lpclpcxpresso

I've been using the LPC8xx range of Cortex-M0+ MCUs quite successfully. One difficiency: these don't have inbuilt EEPROM (to preserve settings across power cycles etc). However there is a work-around: using the in-application flash programmer, a page (64 bytes) of flash memory can be erased and rewritten.

I used this example:
http://www.lpcware.com/content/forum/eeprom-emulation
which works.

My question: this example hard-codes the address of flash to which it will to write to. This seems very dangerous to me. Is there a way to allocate a 64byte aligned block of 64bytes in the flash memory space so that I can be sure it's safe to write to?

(I'm using LPCXpresso / GCC)

Best Answer

Just exclude the top page of flash from the available program memory in your linker map, and building should fail with an error at the link stage if program code overflows into it. You can if you want create a data section in the reserved page and use a pragma to put a data structure there, if you want to hard code the address only in the linker map and nowhere else.

Of course if you contemplate upgrading or downgrading to a part with a different flash size you will have to move it.

Another possibility could be to use the 2nd lowest flash page - you probably need the lowest for an entry point (and possibly the vector table, if that is inflexible?) But that could be one linker section, then a gap for a data page, and then another linker section for ordinary program code extending to the limit of what the current chip has.

Beware default uploads may wipe out your storage by starting with a full-flash erase.