You "read on a forum" somewhere that the CAN bus needs resistors? Seriously!!?
This is a integral part of your design. If you are going to use CAN, you need to understand it, which means reading the relevant documentation.
Spearson is right but for the wrong reason. A differential CAN bus as you likely have (you didn't say what interface chip you are using, but probably you have a standard differential CAN bus as driven by something like a MCP2551 at each node) requires a resistance between the lines. This is because the recessive state is signalled by the two lines passively pulled together, and the dominant state by them being actively pulled apart. The resistors between the lines in that sense are the equivalent of a pullup resistor on a open collector line. Without something pulling the lines together when nothing is driving the bus, the bus doesn't work.
The resistors also function as terminators as spearson pointed out. You generally use twisted pair for the two bus lines. This has a impedance of around 120 Ω. This type of differential CAN bus is defined to have 60 Ω between the lines as a pull-together so that it can be implemented with 120 Ω at each to terminate the bus and avoid reflections.
Section 6.1 of the CAN spec:
BIT ERROR: A unit that is sending a bit on the bus also monitors the
bus. A BIT ERROR has to be detected at that bit time, when the bit
value that is monitored is different from the bit value that is sent.
An exception is the sending of a ’recessive’ bit during the stuffed
bit stream of the ARBITRATION FIELD or during the ACK SLOT.
So, the node which first transmits a '1' when the other is transmitting a '0' will note a Bit Error and then signal an error as normal - by transmitting an error-flag (see Section 3.1.3) , as described formally in Section 6.2.
Informally, if that node is error-active (which should be the usual case) it will transmit an error flag of 6 dominant bits, which all other nodes will also detect (as a stuff error). This has the effect of destroying that message completely:
- no-one will receive it
- none of the transmitters will think they have successfully transmitted anything.
Each transmitter will then attempt to retransmit - depending on the precise timing of the retransmissions, one may start sufficiently before the other the gain control of the bus. Otherwise, the same sequence may happen again. (Or another higher-priority message may put them both off for a while!)
Extended answer inspired by @clabbacchio's answer below.
You mention "nasty nodes", and clabbacchio makes the valid point that if two nodes transmit at different times, each receiver needs to decide what to do with its multiple receptions.
This was demonstrated by a hack last year. The paper discusses, in the section "PSCM specifics", how an attacker can synchronise to the regular messages on the bus and play their evil message just before the one that the "good" ECU is about to send. The receiving ECU accepts the earlier message, updates its message counter and then discards the "good" messages as erroneous, because its message counter has not incremented.
Best Answer
The short answer is that the node must monitor the CAN lines to be idle for a certain time before it attempts to transmit. So if another node is transmitting, it must keep quiet till the other node is done.
A CAN bus is based in differential signalling. The two lines, CAN-High (CAN+) and CAN-Low (CAN-), are both at the same potential when the bus is idle. To send bits, a CAN transmitter puts a differential voltage on the lines of about 2 volts.
A CAN transmitter first sees if the bus is idle and if it is, starts to transmit. How the arbitration works is that a transmitter monitors the bus as it's transmitting. Transmission is done as above by either keeping the two lines at the same potential or at a differential potential. So if the transmitter transmits a bit by keeping the lines at the same potential (sic), but it sees that the two transmit lines have a differential potential, that means that some other node is transmitting and the first transmitter has lost the arbitration. It must then stop transmitting.
When a node first starts transmitting, the bits transmitted are the same until the address of the transmitting node which are obviously different. If two nodes start transmitting together, they will transmit together in sync till the address part is reached. When the address differs, a node will notice a potential difference on the lines even when it is not putting one on the lines. Then it knows it has lost and has to try again. The winning node continues transmitting without knowing that some other node was trying as well. Of course, this logic extends to more than two nodes also.
I hope this helps.