Electronic – How to correctly set logical high level on a PS/2 port

ps2pulluprise time

I'm trying to make a keyboard emulator on ATmega16A. I'm currently implementing logical low as output-zero, and, since the host(?) is supposed to pull up the line, I send logical high state as input mode of my pins. This lets me easily check that inhibit condition hasn't happened while I'm transmitting data, in addition to outputting "1".

But the problem is that in this mode, the time to raise the voltage to 95% VCC appears to be about 25 μs, which is quarter of the maximum allowed clock period (minimum frequency is 10 kHz). So I've now tried to actively drive the pin to VCC, and only then switch it to input mode to check for inhibit condition.

Is this kludge of actively driving the bus high actually legal from the protocol POV? I'm following this document and have failed to find how exactly one should output logical high level.

Should I instead use a lower-resistance pull-up resistor on the keyboard side and leave the pin in input state when trying to output logical high value?

Best Answer

With PS/2 interfaces, both the host and the device should have pull-ups. So put stronger pull-ups on AVR side. Pulling it high even for a moment is just wrong.