Electronic – How to design a LIFT simulator using FSM(Finite State Machine)

At its simplest, for every state machine you have three variables:

1. Inputs - Driven to the state machine. Not directly controlled by the FSM design.
2. State - Internal information about the current state the machine is in.
3. Outputs - Driven out of the state machine.

The state machine design about how it defines State and Outputs based on a series of Inputs over time. The State is registered, so on every cycle, you are trying to figure out the next State. The output is combinatorial, so you need to figure out the current output.

For both Mealy and Moore, the next State is determined by some combination of the inputs, current state, and current output. So it's a bunch of things like:

if (current_state == 5) 
    next_state = 6;
else if (current_state == 4 && input[3] == 1) 
    next_state = 5;
etc...

The output is typically not sequential, but rather combinatorial. And what is used to calculate this output defines whether it is Mealy or Moore.

The more general case is the Mealy FSM which calculates the output with some combination (i.e. AND/OR/NOT, comparators, etc.) of Input and (current) State.

So again, things like:

if (current_state == 5) 
    output = 1;
else if (current_state == 4)
    if (input[3] == 1) 
        output = 2;
    else
        output = 3;
etc..

But if we restrict ourselves to only calculating based on State, it is a Moore FSM. In this case, it would look like:

if (current_state == 5) 
    output = 1;
else if (current_state == 4)
    output = 2;
else if (current_state == 2 || current_state == 3)
    output = 3;
etc..

That really is it. Nothing else. And to top it off, you can convert one form to an equivalent form of the other.

One question that is often unasked is "Why do we separate them into two classes and give them names? Why is it so important?"

The answer is because as you try to create FSMs in real practical circuits, you will find that you are generally able to get better performance from a Moore machine. (They usually can run at higher frequencies). However, for many people intuition leads them to think about state machine problems more closely to the Mealy model.

By classifying them, we can teach ourselves to think about state machines problems in both models. This allows you to pick the correct model for the problem you are trying to solve. The details about why Moore runs faster and the tradeoffs between when to choose the two designs comes with experience and knowledge about digital design.

An FSM typically has 2 always blocks: 1 sequential (with a clock), 1 combinational (no clock). Assuming you have a clock and an asynchronous reset (untested):

module FSM(D1,D2, NextState, clk, rst);
input D1,D2,clk,rst;
output [1:0] NextState;
reg [1:0] CurrentState;
reg [1:0] NextStateOut;
parameter S0=2'b00, S1=2'b10, S2=2'b11, S3=2'b01;

always @(posedge clk or posedge rst) begin
    if (rst) begin
        CurrentState <= S0;
    end else begin
        CurrentState <= NextStateOut;
    end
end

always @*
 begin
 case(CurrentState)
 S0:
 begin
    if(D1==1'b0 && D2==1'b0)
        NextStateOut =S0;
    if(D1==1'b1 && D2==1'b0)
    begin
        NextStateOut =S1;              
    end
end
S1:
begin
    if(D1==1'b0 && D2==1'b0)
    begin
        NextStateOut =S0;          
    end
    if(D1==1'b1 && D2==1'b0)
        NextStateOut =S1;
    if(D1==1'b1 && D2==1'b1)
    begin
        NextStateOut =S2;                  
    end
end
S2:
begin
    if(D1==1'b1 && D2==1'b0)
    begin
        NextStateOut =S1;      
    end
    if(D1==1'b1 && D2==1'b1)
        NextStateOut =S2;
    if(D1==1'b0 && D2==1'b1)
    begin
        NextStateOut =S3;                  
    end
end
S3:
begin
    if(D1==1'b1 && D2==1'b1)
    begin
        NextStateOut =S2;
                end
    if(D1==1'b0 && D2==1'b1)
        NextStateOut =S2;
    if(D1==1'b0 && D2==1'b0)
    begin
        NextStateOut =S0;           
    end
end
endcase
end

assign  NextState= NextStateOut;

endmodule

Some modifications:

1. Combo always block uses @*
2. Use blocking assignments (=) in combo block
3. Use S0 parameter instead of 2'b00 in last assignment.