Electronic – How to determine bandwidth available at USB ports

intelusb

I am considering a mini-itx single board computer for a project that makes heavy use of USB. I want to ensure that certain USB devices have enough bandwidth. For example I have a data acquisition board that uses a bulk input but those transfer frames do not have guaranteed bandwidth. By placing this on a dedicated controller then I believe 80-90% of the high-speed bandwidth will be available as 10-20% is allocated for control endpoints. In other words, and if I understand this correctly, there will be enough free frames to support the bandwidth needed by my board.

But I'm looking at block diagrams that show physical USB ports going back to the Intel processor and it's not clear to me how these are tied together internally. There is the ICH that appears to contain EHCIs that will support high-speed. How can I know if my data acquisition board is sharing the bus controller with other devices?

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Best Answer

Starting from 6-th generation of Intel processors (Skylake-KabyLake, and some mobile SoC as Braswell), the EHCI (legacy USB 2.0 controller) has been eliminated from Intel platforms. The USB 2.0 service now comes totally over the xHCI USB 3.x controller using "native USB 2.0 support".

The USB 2.0 support over xHCI comes with one very positive improvement: the USB 2.0 HS(High Speed) bandwidth is no longer shared between root ports, so several HS bandwidth-demanding devices can co-exist on a system without starving and sharing. Here are some more info on the subject.

So you shouldn't worry about eating your bandwidth by someone else as long as your device is connected to USB root port and not over USB hubs - the hubs have only standard sharing architecture.