Electronic – How to remove the offset from the DAC output and change the range

You are way over-thinking this. Given the long thermal time-constant of the system, there's no need to worry about high-order modulators, or how the sample rate of the sensors relates to the sample rate of the output.

Yes, delta-sigma is a good way to control the heater power, but a basic first-order implementation will be more than enough for your purposes. One side comment: it would be friendier for your power company to switch based on whole cycles, rather than half-cycles.

Your control loop produces an updated power setting at a 0.959 Hz rate. Let's assume that this setting is an integer between 0 and 255, representing 0 to 100% power.

You want to update the triac gate at a 60 Hz rate. Let's assume you have an interrupt that's synchronized to the rising zero crossings of the power line.

Set up your interrupt handler so that it has an 8-bit accumulator. On each interrupt, add the power-setting value to that accumulator, and if there's a carry out from the addition, turn on the triac for that cycle.

It really is that simple. The overall average duty cycle of the heater will match the power setting exactly. If you really feel you need higher resolution, you can use 16-bit values for the power setting variable and the accumulator in the ISR.

Here is what I get in simulation for this circuit, given a 10mV input pulse of the shape used in the Bob Parker meter- 10usec pulses at 2kHz.

Gain is about 18 with the trimpot centered and the midrange beta transistors used (BCXXB). Range is from about 13 to 27. A better choice for R16 would be 150\$\Omega\$ if the gain is supposed to be exactly 20.

Temperature sensitivity of the bias is fairly large- 347mV at 0°C, 461mV at 25°C and 584mV at 50°C. Gain varies from 17.7 to 21.0 over that temperature range (with nominal gain at 19.8 at 25°C).

There are some similar examples here - see figures 39 and 40. AC coupled amplifier with feedback using complimentary transistors. Note that the bias is optimized for low duty cycle positive-going pulses (idles close to the negative rail).

As to how it works- R11/C9 filter noise from the 5V supply and give about 4.8V for the amplifier. R12/D5/D6 clamp then input voltage to the rails. C7 provides AC coupling. R13/R14 set the DC bias voltage at the base of Q7 to about 3.3V.

You should be able to analyze the DC bias point analytically in a fairly straightforward manner (ignore C8/R16/VR2) and the AC gain by using the hybrid-pi models for the transistors. It's less closed-loop gain than the ratio of resistors would suggest because the open-loop AC voltage gain of the pair is only a few hundred.

By the way, although the limited accuracy and stability of the amplifier might suggest replacing the transistors with a op-amp, you will find that the rise time of a couple hundred ns is very hard to achieve with a low-cost op-amp. This circuit is well optimized for the purpose by a very competent designer.