How to make automatic reset of slave timer in gated mode in STM32 mcu?
Summary:
I've done synchronization between 2 timers: Timer#1 is configured as a slave in gated mode, Timer#2 is configured as a master, it toggles its output compare channel, which is an input for slave timer.
The timer overview (AN4013 application note on timers) states that:
"the counter clock is enabled when the trigger input (TRGI) is high. The
counter stops (but is not reset) as soon as the trigger becomes low". And it works just like that: when output of master timer becomes high, slave timer starts, and when it becomes low – it stops, but not reset, which leads to undefined behaviour – after changing output from "high" to "low", line sometimes becomes low (as I need it to) and sometimes doesn't change (standing high).
So the question is, if it possible to reset slave timer on trigger becomes low?
PS: I'm using STM32F103C8T6 microcontroller
Best Answer
I can't answer this specific question, but I have been trying to work through some timer problems of my own. Searching for that application note has an interesting 2nd hit on the ST forums..
One user volunteers some sad truths about the documentation:
Hopefully you find some answers in his errata... I have a lot of reading to do :/