Electronic – how to stabilize opamp amplifier oscillation

operational-amplifieroscillation

I've designed the following amplifier circuit to amplify a DAC signal (sorry for the non-standard opamp symbol):

enter image description here

It's a power amplifier which amplifies a microcontroller DAC signal 0-5VDC and very low current, to 0-22VDC, with current draw up to 2.5A. That would be a gain of approximately 4.4. The input voltage only changes several dozen times per second. Let's say 100Hz to be safe. But it needs to operate over a wide range of (fluctuating) loads. Load could be from 5 ohms to 5 megaohms for example.

It simulates just fine with the default PMOS component, which I suppose is an ideal FET. But when I add all "real" components in, I get oscillation occuring. How might I stabilize this? How accurate is a simulation in such things compared to a real circuit?

Is there anything else that looks like it could be an issue in this circuit, for example part choice, voltages, etc?

LTspice v4.22s schematic download: enter link description here

EDIT:

I've made some changes based on mostly trial and error, but educated by the replies below. I managed to remove the oscillation fairly quickly, but, I have no idea why adding a capacitor in each of these locations solved the problem. I needed both of them, and I needed to fine tune their values a bit.

Greatly reduced oscillation using a combination of ideas

This is for a power supply so the new voltage spike at the beginning is rather disastrous. Here is a closeup of it now with a resistor added in series with C1 to stop it oscillating:

Closeup of voltage spike

Best Answer

A bare bones OP-AMP is "close-to-unstable" in a lot of circumstances (even in very simple circuits). There is a parameter called phase margin and this informs the reader that at unity gain, the inverting input is significantly close to being non-inverting - phase margin tells you how close the inverting input has become a non-inverting input.

For instance, a typical op-amp might have a phase margin of 40 degrees. This means that instead of the inverting input producing a 180 degrees shift (i.e. true inversion) it is more like 40 degrees.

This of course will be at a high frequency where the op-amp's characteristic has dropped to unity gain i.e. far above where you would consider using it normally. But it's still there in any op-amp circuit you might design.

If you add transistor amplification (say 20dB) after the op-amp output (and before the feedback), you will now have a phase margin that is 40 degrees at a gain of 20dB and, if you determined what the phase margin is at a higher frequency (one where the extra 20dB is eroded to zero dB) you'll almost certainly find that the phase margin passes thru zero degrees and therefore you have created an oscillator!!

Here is a similar question/answer

EDIT - I've added a picture of the open-loop gain and phase of a medium speed op-amp to consider: -

enter image description here

This graph is the basic operation of the op-amp in question (AD8605) and is irrespective of how you apply feedback and how much you apply. The only point is that the red line (gain) will rise maybe 10dB when you put transistors within the feedback loop.

With the red line rising by 10dB, the unity gain crossing point is around 30MHz - what is the new phase margin - it's probably about -40 degrees i.e. well past the point of stability. Look at the graph - with sufficient gain added inside the feedback loop, this device (AD8605) will oscillate at about 25MHz.

Lower the gains in your transistor circuits is my advise.