My application is that I'm trying to create a very small, "button battery" powered device to sense the opening and closing of a switch and send state changes via WiFi to another device on the network. I will be using an ESP8266 (ESP-03) which has a reset (RST) pin and a deep sleep mode.
To my understanding, the deep sleep mode can be initiated by software. Then the RST pin on the ESP needs to be brought low for at least 100us (but preferably less than 0.1 sec) to wake it up. At that time it can check one of the GPIO inputs to see if the switch is open (high) or closed (low) and then put it back to sleep until the next open/close event.
To clarify by example, one application would be to send a notification each time a box is opened or closed, which needs to include the current status. For instance, it sits closed on a shelf. When someone opens it the ESP wakes up, sends an "is open" signal, and then goes back to sleep. When the box is closed it wakes up again, sends an "is closed" signal and goes back to sleep. The box may be open or closed for a long time, so we only want the reset pulse signal sent when the state changes.
I've seen some other articles that talk about similar situations but there don't appear to be any "this worked" comments or the cases are slightly different. The monostable flip flop looks promising (http://www.bowdenshobbycircuits.info/page9.htm), but am I understanding it correctly? Also, will it drain the battery?
I'm trying to keep this device as small and energy efficient as possible.
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Added:
An XOR (Exclusive OR) gate (or XNOR) can be used to produce an output pulse on the rising or falling edges of an input signal. An XOR 'truth table' is:
IN Out
00 0
01 1
10 1
11 0
ie - the output is high when one only input is high. Both inputs low or both inputs high produce a low output.
In the diagram below the RC combination acts as a delay that causes any input level change to be delayed in arrival time at the RC connected input relative to the directly connected input. When a continuous high or low is input, both XOR inputs are the same polarity and output is low.
When the input level transitions there is a period of about t = R1 x C1 when the two inputs are not the same and an output pulse is produced.
Ideally Schmitt triggered inputs would be used, but std inputs "work OK" - subject to there being no input transients.
The RC only consume energy when the capacitor charges or discharges and this can be very small so the circuit achieves extremely low power consumption. CMOS gates when not switching draw sub microamp currents.
You can get single XOR gates in a package so small it's almost a breathing hazard. One of many is 74AHCT1G86SE-7
simulate this circuit – Schematic created using CircuitLab
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Something as simple as this may work for you depending on overall application (as sometimes unspecific "extras" complicate the requirement).
This shows the general principle and you may have to 'play' somewhat.
/RST is assumed to have an internal pullup to Vdd. If not, one can be added.
Initially, SW1 open = uC sleeping.
SW1 closed = /RST low and Cd is charged low. SW1 open releases /RST and processor come out of sleep.
Cd level can be read via GPIO.
Cd level returns to Vdd = high after a period > t= RdCd.
If the switch is the only thing that brings the processor out of sleep then the GPIO read and no circuitry is needed except apart from the switch and a pullup for /RST (internal or external).
simulate this circuit