Electronic – If I need to access memory cell by cell, should I shift or index

memoryverilog

I have a piece of memory which I need to access cell by cell:

parameter RAM_LENGTH = 1024;
reg [7:0] mem [RAM_LENGTH - 1:0];

I need to iterate cells sequentially. It looks like there are at least two ways to do this. The first approach is to index memory as if it were C array of bytes:

reg [7:0] ram_addr = 0;    
reg [7:0] current;

and then

current = mem[ram_addr];
ram_addr = ram_addr + 1;

This is cheap for CPU. But what if Verilog builder will attempt to build a 1024 channel 8 byte width multiplexer for me? This would be a digital circuit of tremendous size that this memory may not deserve. Or is the Verilog builder smart enough to implement access by index more reasonably?

The alternative approach would be to shift the cells every time the value is needed:

current <= mem[0];
for (i = 1; i < RAM_LENGTH; i++)
  mem[i] <= mem[i-1];

in this case, I would hope from the builder to generate a shift register rather than overgrown multiplexer, as all values that define the loop are constants.

Which approach is more reasonable and would be typically used by an experienced Verlilog developer?

Best Answer

Both approaches are viable, depending on what you want the synthesized implementation to be.

The indexed version would typically be used if you want the memory to be implemented using the internal block ram in the target device. In this case, the clock speed is limited by the memory access time.

The shift register version will use the registers in the logic cells, or in the case of Xilinx could use the SRL shift register mode of the LUTs. The shift register mode could potentially be faster, but it will use more routing and LUT resources.

In any case, you can always directly instantiate FPGA specific logic blocks in order to remove any ambiguity about how things get synthesized. The "generate custom IP" functions of FPGA development environments allow you to generate custom sized memories, FIFOs, shift registers, etc.

Related Solutions

Electronic – backdoor memory access

This question really needed a bit more context than simply "How does backdoor memory access work?". A link to a 198 page document for us to read, in order to guess what you are asking, is not really conducive to getting good answers.

Even basic context such as "in the context of HDL simulation" which appears to be what you're asking, would help.

That being said : when simulating a system (maybe testing a CPU you have implemented on an FPGA) you will need to connect the CPU up to external memory in your testbench. The memory model may look like:

entity SRAM is
   port (
      Address : in    unsigned(15 downto 0);
      Data    : inout std_logic_vector(15 downto 0);
      Wr_n    : in    std_logic;
      OE_n    : in    std_logic;
      CS_n    : in    std_logic
   );
end SRAM;

and you might write this memory model yourself or download it from a vendor.

Now, loading a large program through these ports will take a lot of (wasted) simulation time. Ditto saving the program's output for later analysis.

However there is nothing to stop you adding more connections to the memory model, which are entirely separate from actual pins on the physical memory, and connect directly to your testbench.

For example you could add a backdoor interface consisting of the ports

  Filename : in String;
  Load     : in std_logic;
  Save     : in std_logic;

and suitable behaviour (reading a binary file) in the SRAM architecture. Then in the testbench (assuming Progmem_Filename is connected to the correct Filename port) you can write

  Progmem_Filename <= "selftest.elf";
  Load             <= '1';
  wait for 1 ns;
  Load             <= '0';

and your program memory is loaded and ready to run.

Electronic – memory for the simplest possible computer (Pi0K)

There are many people who have built computers out of discrete transistors, ICs, relays, and even vacuum tubes. They range from 4-bit machines all the way up to 32-bit. The 4-bitters of course will be the simplest you can build and do anything. The very first microprocessor was Intel's 4-bit 4004.

I would start by searching Google for "home-brew 4-bit computers" (without the quotes).

Here's a board from a transistorized 4-bit computer:

As far as memory goes, some of these projects which otherwise are using discrete transistors "cheat" and use SRAM chips. They are incredibly cheap for moderate amounts of memory, 32KB is $3.28 and requires no clocks and no refresh.

Even if the rest of your computer uses relays, using them for memory will be prohibitively expensive.

If you can get by with 1K bits, you could build one with transistorized flip-flops; 2048 2N3904's will cost 3¢ apiece ($60 altogether, plus the other components which will be even cheaper -- resisters for 1/2 a cent etc). You can get PCB's made for $10 apiece, then hire a kid to stuff them.

Relay computers date all the way back to the late 1930's, and one of the first was the Harvard Mark I. It's where the name Harvard architecture comes from (separate program space and data, compared to von Neumann architecture that combines the two).

The most famous home-brew relay computer is one built by Harry Porter.

Check out the videos of the computer running. Reminds me of an old electromechanical telephone exchange.

Here's a portion of another home-brew relay computer called Zusie:

Lots of blinking lights.

And finally, here's a link to a video of a 4-bit adder, made up of 24 relays. Adders like this are the heart of the ALU (arithmetic logic unit) in a computer.

Best Answer

Related Solutions

Electronic – backdoor memory access

Electronic – memory for the simplest possible computer (Pi0K)

Related Topic