# Electronic – Increasing Voltage

level-shifting

I have a binary signal, 0V to 1.4V, which I can't change directly. What circuitry, (on a PCB) can I use to increase 1.4V to at least 2.5V.

Do I need a transistor? I guess I'm looking for a switch that will "close" when there's 1.4V? I'm a complete noob at electronics, but I'm alright at physics and understanding the equations

You're asking for a logic level shifter.

There are packaged chips that do everything for you, but it's also not hard to construct one yourself from discrete parts. There are many ways to do it, each with different tradeoffs.

I find this schematic, from NXP Semiconductors' AN10441 to be a quite elegant way to get that function:

This schematic shows the logic level shifter on an I²C bus, which has two signal lines. If you need only one line shifted, you need only one MOSFET and two pull-up resistors, one on its gate and the other on its drain. Similarly, if you need more lines shifted, you simply add a MOSFET and pair of pull-up resistors to each line.

For the example shown in the schematic, with 3.3 V and 5 V logic levels, any small-signal MOSFET will work, such as the ubiquitous 2N7000. Most generic MOSFETs have a VGS(th) maximum too high to work with your 1.4 V logic level, however. You'll have to look to something more specialized like a Vishay TN0200K or a Zetex (Diodes, Inc.) ZXMN2B14FH.

The values of the pull-up resistors (Rp) depend somewhat on the application, but will have a wide range even then. 10 kΩ is a popular value here, giving a good tradeoff between speed, noise, and current draw. I could see using a value as low as 1 kΩ in certain circumstances, and values North of 1 MΩ in others.

The app note describes how the circuit works, but to paraphrase:

• With nothing attached to the data line being shifted, the pull-up resistors bring the data line to the low-voltage logic level (VDD1) on one side and the high-voltage logic level (VDD2) on the other.

• When the low-voltage side brings the signal line down, it drags the MOSFET's source pin down. Since the gate is tied high, this causes the MOSFET to turn on when VGS passes the VGS(th) threshold, so it conducts, dragging the high-voltage side down, too.

• When the high-voltage side wants to do the same, it's more complicated. This circuit scheme relies on the fact that every MOSFET has a parasitic diode built into it, which is shown in the above schematic's MOSFET symbol. (The MOSFET symbol isn't always drawn with the parasitic diode showing, but it's always there.) By dragging the drain pin down, the high-voltage side causes this diode to conduct, which indirectly drags the low-voltage side's source pin down, causing the same thing to happen as in the previous case.

This tendency of the circuit to "ride high" by default may not be appropriate for all applications. If one end can ever become disconnected and the device left connected isn't actively pulling the data line down, the data line will go to the high level. This is fine for I²C, since the high logic level is the normal idle condition. If your data line doesn't work like that but neither end can become unplugged and at least one end is always actively pulling the line down when it wants the line to be low, this circuit will still work.