Here's a sample datasheet from a FET driver:
http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=ucc27211a&fileType=pdf
Section 9.2.2.5 describes calculating power dissipation. Obviously the dynamic power dissipation goes up with switching frequency.
However, what I am unable to determine is should I use a full-period or a half-period for this calculation.
I've always assumed that "switching frequency" means "what is the frequency of switching events"
For example if the minimum time between changing states (either from low to high, or high to low) is 2us. This means a switching event happens every 2us, so the frequency of switching events is 500kHz. However I've seen several places where the term "switching frequency" seems to imply a full cycle, so the frequency for this would be 250kHz as it takes 4us for it to go from one "low" to the next "low" state.
Which definition is the one that TI is using in this data sheet?
Best Answer
The linked datasheet tells us this:
(emphasis mine)
So they consider the whole cycle. I've not yet come across the interpretation of switching frequency like you had in mind.
Note that they already calculated that you have to take double the frequency in calculation of the power:
The energy to charge the gate would just be: \$\frac{1}{2} C U^2\$ and that energy is wasted at every edge (like you said). So the power dissipation is: \$\frac{1}{2} C U^2 \times 2 f_{SW}\$