Electronic – Is the schematic of the TPS54240 buck converter correct

It appears that the problem was with the shape of the traces on my PCB. The following PCB design works correctly:

Unfortunately I still do not understand the real reasons behind this well enough to explain it, but I think it has to do with parasitic capacitance and inductance of the traces at high frequencies. It appears that at 1MHz these things really do matter, which also explains why I had so much trouble with the breadboard earlier.

This IC has a pulse skipping mode which is active under very light loads, and it is showing up in your oscilloscope display as pulses spread far apart from having no load.

Per the PDF Datasheet:

At no load or light load, the converter may operate in pulse skipping mode in order to maintain the output voltage in regulation. Thus there is less time to refresh the BS voltage. In order to have enough gate voltage under such operating conditions, the difference of VIN –VOUT should be greater than 3V. For example, if the VOUT is set to 3.3V, the VIN needs to be higher than 3.3V+3V=6.3V to maintain enough BS voltage at no load or light load. To meet this requirement, EN pin can be used to program the input UVLO voltage to Vout+3V.

Having a >5% minimum load should reduce the tendency to produce pulse 'burst'. Doubling the value of L1 and making C2 a much higher value (220uF) can smooth out these burst. Running the IC at >10% of full load should take it out of pulse-skipping mode.

The less current you draw the deeper into pulse skipping mode it goes, so use larger values of L1 and C2 to smooth the output to a almost clean DC waveform, and/or make it a point of having a minimum load that prevents wide skipping periods. That is just the nature of this type of switch-mode IC.

EDIT: Pay close attention to grounding techniques. Make sure C1 and C2 are as close to the IC as possible. Notice the junction of grounds at pin 5, which is where C1 and C2 should be connected with as short of leads as possible. Remember the triangle: C1 is effectively your current source, the IC is your current switch, and the load (through L1) is your current sink. In SMPS designs this triangle has these parts close and with short leads, keeping erratic noise to a minimum.