I'm implementing a CAN Bus receiver in VHDL under 250 kbit/s, and a curious frame turned up. This is finishing the field of CRC, the last under the application of bit stuffing. And I have:
…011111000001
I don't know if that final 1-bit is the beginning of the CRC delimitter field or a bit stuffed to will be ignored.
Any ideas?
Thanks!
Best Answer
Finally, I found the answser!
The final bit is a bit stuffed, because the previous five zeros are inside of CRC field. The next bit to final 1 is the CRC delimitter bit, and next the ACK slot bit.
Now the ACK is sent in its correct place and no error is present in bus.