I have 3.3V 125MHz clock signal which need to be translated down to have an amplitude of 1.8V. My first idea was to use some logic inverter, run it on 1.8V, and since it probably has protection diodes on its input everything should be fine. I have found a nice model from TI, SN74LVC1G04-Q1. In the product details, it is written max frequency at nom. voltage is 150 MHz. Does this mean 150 MHz of square signal, or the highest frequency component?
Besides buying a logic inverter I was also thinking of making a discrete inverter or even use a simple transistor switch. So my questio is basically, which direction should I go?
Best Answer
For reducing the clock voltage from 3.3V driver to 1.8V at receiver, you can simply use a resistor divider, properly designed for your trace impedance.
Even more, you just need to put a trace impedance-matching load at the receiver end of clock trace, and the voltage amplitude will come down naturally.
I would recommend to use the free LTspice tool to model your source, trace (transmission line), and input pin model to get proper resistors and tune up the network for nice-looking clock.