Electronic – Logic gates not working as expected

digital-logic

I've put together a ESP8266 based board which I want to deep sleep until a PIR sensor senses someone nearby. I put together some logic gates which should allow me to control whether or not the PIR sensor is enabled or not. PIR sensor is a SR602 which goes HIGH for 2.5 seconds once it senses someone.

Circuit diagram

The idea is the ESP pin should stay high while the ESP8266 isn't in sleep which should mean that the output to RST is always HIGH, then I turn the ESP pin to LOW in sleep so the PIR sensor can start-up the ESP again when it goes HIGH.

I did a simulation and it worked as I expected but on the board it seems that the inverter isn't inverting (tested with a multi-meter 3.3v in comes out as 3.3v, GND in GND out). No matter what I do with the ESP pin the PIR constantly triggers a reset.

Can anyone see where I went wrong here?

Edit: close up of the inverter
closeup

Best Answer

Connect the 2A pin to VCC or GND. When you leave a CMOS input open, not only will you get a much higher power consumption, but the corresponding output might oscillate in an uncontrolled way, which can affect the other logic in the device.

The datasheet of the inverter says:

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Also see [FAQ] How does a slow or floating input affect a CMOS device?

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