This circuit provides 30dB gain to a 100kHz signal with a 10k input impedance. Is capacitor C2 necessary to suppress DC gain or is it redundant with the AC coupled input?
I would also like to make this circuit single-supply and I don't see how include the C2 effect. I also need to minimize noise around 100kHz.
EDIT: The bandwidth required is 100kHz ± 5kHz and it may be driven by an inductive source with C1, R1 tuned for a 100kHz resonance.
Best Answer
For the case where Vdd is at a positive DC voltage, and Vss is at a negative DC voltage, C2 could be removed...if you don't mind some DC offset at the output caused by amplified offset voltage.
For the case where Vdd is at a positive DC voltage, and Vss is ground (unipolar power supply), C2 is required. The usual circuit goes like this, requiring a very clean noise-free Vdd supply:
simulate this circuit – Schematic created using CircuitLab
You'll want an op-amp with gain-bandwidth product greater than 5 MHz. The default TL081 shown has insufficient 3 MHz. You have two high-pass filter corner frequencies: \$ F1 = \frac{1}{(2 \pi (C1) \frac{R1aR1b}{(R1a+R1b)})} \$ \$ F2 = \frac{1}{2 \pi (C2 R3)} \$
If your bandwidth is 100 kHz, and center frequency is 100 kHz, then these two corner frequencies should be set well below 50 kHz. C1 is unlikely to resonate easily with an inductive source with this high input impedance amplifier.