Electronic – Lower Voltage LED organ

They are regulators as you thought.

To properly control the MOSFET on each regulator, the gate needs to rise several volts above the source, probably over 6 volts greater than the source. If the source voltage is 3.3 volts the gate might need to rise as high as 9 or 10 volts when the MOSFET is driving a heavy load current. This means the op-amp MUST be powered from a supply greater than 10 volts.

The non-inverting input is the demand voltage for the regulator - for the 3V3 supply the non-inverting input will be 3.3 volts and ditto the 2V5 supply.

The MOSFET is rated at 20 amps and this means the supply current to the circuit might be in the realm of 5 to 8 amps - try and find a linear voltage regulator that would fit the bill an be a low drop-out type - realistically with a drain voltage of fractionally above 3.3 volts the output would still be in regulation. This is of course due to the op-amp being powered from 12 volts.

As to whether it is a bad design, I'd say not BUT I don't know the full spec of the circuit.

This is not generally a good idea (death to your ADC) so let's walk through the problem.

Looking at the DS on page 5: -

• For a positive rail of 15 volts the maximum guaranteed output is +12 volts
• But typically it could be +14 volts

Let's say you decide that the +12 V figure is best (you are guaranteed no more than a 3 V drop from the positive rail). You would use a +8 V rail and be able to generate a peak signal of +5 V.

Now, you build the circuit, put an input on the 741 and destroy the ADC. Why does it destroy the ADC you might wonder - it's because the 741 is able to provide between +5 V (guaranteed) and +7 V (typical) to the ADC and +7 V is likely to exceed the maximum rating on input voltages that your ADC can safely handle. No matter how careful you are at putting the right sized signal into the 741, you will eventually destroy the ADC (unless it has good input overload specs). You might even destroy the ADC in the first milli second you apply power to the (really crappy) 741.

The proper way to do this is use a rail-to-rail op-amp driving the ADC. Yes you lose maybe 50 mV at the top (+5 V) and 50 mV at the bottom (0 V) leaving you with a span of 4.9 volts but this is the price you must pay.

Same problem with the negative rail. Yes you can find a negative rail to work for your op-amp but you are going to likely destroy the ADC with excessive negative voltages.

From a different angle, try looking at the ADC data sheet and see what it says the usable range is - there may be a zero offset figure of several millivolts and this tells you that the lowest several mV of the ADC input is likely unusable. There may also be an ADC gain tolerance that prevents you using to top several mV so, even if you had the perfect input signal to the ADC, you can never guarantee that you can use the whole range.

How big a deal is this? OK so you limit your input range to say 4.8 volts out of 5 volts - that's 96% coverage. Let's say your ADC is 12 bit. Your coverage is 96% of 4096 = 3932 LSbs. Take the log of 3932 and divide by log2 to get the actual usable number of bits i.e. 11.94. Not much of a compromise is it?

If you look at most ADC specs, you will find that they specify SNR (signal to noise ratio or other AC performances) with an input signal that is typically 0.5 dB down on theoretical full-scale. How much is 0.5 dB down in real numbers for a theoretical 5V span?

It's 94.4% so don't get hung up on this and don't try overdriving your ADC.