The problem with hobby related solutions is documentation is limited and not spec'd like commercial components or modules.
It is possible that it may work but make a block wiring diagram and consult with the OEM is advised. Mind you I don't know if they have adequate support for your question as these are built in China.
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It appears that your ultrasonic load is TTL so there is no problem switching 5 at the same time with a BEC, but I wonder if you have considered the effects of crosstalk on firing all at the same time. They indicate a 15deg detection angle but this would depend on the reflection angle of objects you wish to detect. There may be phasing issues with reflection cancellations like having 5 tweeters directed in a room. Reading the response of each echo in parallel with a time interval count won't be a simple textbook result with non-smooth objects with 5 senders.
YOu can test your orthogonal array design with any signal pulse generator and look at the signal on a parallel port logic analyzer or scope to ensure what you are design will work.
Power drive is the least of your concerns from these low power devices. Noise avoidance from conducted and radiated sources will be paramount and design of the transponder array must come first. I would spend some time on testing this part 1st to identify all the electrical, physical, acoustic, EMI, thermal, vibration both conducted and radiated sources of interference and how each affects your SONAR expectations with different objects. Will it be microphonic with vibration or loud pulse noises. How well does it reject other ultrasound sources of noise? Will the TTL Echo output change in pulse width with signal strength or just the delay time.
Will you get echos from the wrong sender due to corner refection effects.
I think a couple of voltage dividers will fit the bill perfectly. Presuming a 'full-scale' input will produce +1.29 volts on one output and +3.80 volts on the other output (and vise versa for negative full scale), the difference between the two is 3.80 - 1.29 = 2.51 volts. If you scale both output voltages down by a factor of 2.5 to get the differential voltage on the right scale, you get 0.516 and 1.52 volts, both of these within the 0 to 3.3 volt range. So I would suggest simply building two divide-by-2.5 voltage dividers.
Let's assume the output voltages are split into differential and common mode components. In this case, the output voltages Vp and Vn would be Vp = Vc + Vd and Vn = Vc - Vd. If you use decent voltage dividers, the output voltages to the ADC would be Vp,adc = (Vc + Vd) / 2.5 and Vn,adc = (Vc - Vd) / 2.5. Then the converter takes the difference internally, Vadc = Vp,adc - Vn,adc = (Vc + Vd - Vc + Vd) / 2.5 = Vd / 1.25.
Now, if the dividers are not exactly matched, then the result is a little different. Call the divider gains K1 and K2. The ADC output voltage will be Vadc = Vd (K1 + K2) + Vc (K1 - K2). The differential gain is Adm = (K1 + K2) and the common mode to differential gain is Acm,dm = (K1 - K2). In this case, the error caused by the common mode voltage will be proportional to K1 - K2.
Best Answer
Setting MUX[5:0] to an appropriate value will allow you to perform a differential ADC on the ATmega2560 with various levels of gain. See the ATmega2560 datasheet, §26.8.2, "ADCSRB – ADC Control and Status Register B" for details.