Unless your microcontroller has a direct bus support for interfacing to DDR/DDR2/DDR3 type RAM or your microcontroller is interfaced through an FPGA which has been programmmed to provide the RAM interface then it is likely that futzing around with DIMMs is not a useful exercise. There are several strong reasons why this is the case....
1) DDR memory chips may be operating at lower voltages than your microcontroller.
2) The interface to the DDR memory is multiplexed and requires precise clocking whilst the multiplexed lines change states in sync with said clock.
3) Modern DIMMs are designed to operate at very high frequency clocks of 800MHz, 1066MHz, 1333MHz, or 1600MHz. Signal integrity is extremely extremely important when designing the circuit connections to the DIMM. It is not a trivial exercise and the memory chips can be extremely sensitive to noise as a result.
4) DDR memories require constant refresh to keep the memory cells data valid. Without refresh the memory content fades away over time from milliseconds to seconds.
5) The command structure to operate modern DDR RAMs is complex. The most complicated part is getting the initialization sequence correct which consists of some 13 to 20 individual steps.
6) Modern DIMMs are designed to feed data to modern PC type computers very fast. The typical DIMM has a data path width of 64-bits. Multi rank DIMMs also require multiple clocks and chip select signals to access all of the memory chips on the memory stick. It is unlikely that the typical small microcontroller can make effective use of this wide data format without an excessive amount of external circuitry.
Keep this in mind too. Companies that make PC style processors that utilize DIMMs have onboard controllers to interface to the memory sockets. There is an engineering specialty for programmers that work in the BIOS field called MRC (memory reference code). This is the program code module that initializes the DDR controller and all the attached DIMMs. This specialty employs the best and some of the most senior BIOS programmers that do nothing but MRC coding as a full time job.
Best Answer
SRAM, DRAM has infinite endurance.
FLASH, FRAM, and EEPROM have limited endurance.
SRAM is made with transistors or mosfets. It's an active component that loses its state when power is removed.
DRAM uses tiny capacitors to temporarily store data, these are continuously refreshed by the memory controller because these capacitors leak. Both DRAM and SRAM will work until material degradation renders the part unusable. (decades)
FLASH and EEPROM work similar, by using capacitive effects on fet gates, and these do have limited endurance. "Flash wear" is caused by erasing due to slowly accumulating charge around the flash cells during erase. When flash is erased, it is erased to a logic 1 by a "high" voltage.
FRAM works magnetically, it also has limited endurance. But the write cycles are in the trillions, almost infinite.