I'm reading a paper by Guillermo Serrano and Paul Hasler, A Precision Low-TC Wide-range CMOS Current Reference, IEEE JSSC Vol 43, no 2, Feb 2008. Link to paper – requires subscription to IEEE Xplore to acces
In this paper they use the temperature coefficient of a MOSFET to cancel out the temperature coefficient of a resistor.
I understand the temperature coefficient of a poly resistor: As temperature goes up, the amount of electrons in the conduction band increases as the bandgap decreases. Hence there are more charge carriers, causing more current to flow at lower voltages. (so a higher conductivity or lower resistance).
What I'm confused about is the temperature coefficient of a MOSFET. From what I know, the mosfet actually has a shift in temperature coefficient – at high gate-source voltages it has a positive temperature coeficient, at low gate-source voltages it has a negative temperature coefficient. This negative tempco is what causes thermal runaway to occur. Plotted on a graph, this looks something like this (from an ON Semi appnote – AND8199
But what physical properties underly this temperature coefficient? What I have been able to come up with is that as temperature rises, the valance band will go up. As a result, more potential is needed to enter inversion. As less electrons are formed in the inversion later (or holes, depending on the substrate doping) there is less to conduct, and thus the current decreases. Is this correct? What about the negative tempco at low Vgs? Can anyone explain?
Best Answer
The negative bit at the start is Boltzmann doing his thing on the threshold voltage (Vt). The voltage at which the inversion channel conducts, is lower. At the same time, heat decreases carrier mobility by increasing scattering -- phonons hit them. These effects were mashed together by Varshni to get an approximately T^2/(a+T) relationship between band gap and temperature. Carrier density is affected by temperature, but it's only significant for temps less than 100K or more than 400K.
Band-gap variation only matters at low Vgs (Vgs < Vt). Once the inversion layer is formed, whatever the band-gap was doesn't matter anymore, as it has been overcome. Carrier mobility effects takes over at higher Vgs.
The image you're showing is for a power FET with Vt=2-4V, so the table shows both effects. Note: Many low Vt FETs have a positive temperature dependence at low voltages (as well as high). I'm not sure what's going on there, but it's something fishy.