Electronic – Nmos trigerring in 4-20mA converter

4-20maconverternmos

Here is the circuit I am trying to understand:

enter image description here

It comes from the following application note from LT:

https://www.analog.com/media/en/technical-documentation/technical-articles/D61_EN-Convert.pdf

I am wondering how the Nmos will ever be triggered. Now from my point of view, the op-amp's negative input should track the voltage on the positive input, setting transistor M2's source voltage to Vin. Now since the op-amp is in the voltage follower configuration, the voltage at M2's gate would also be Vin.

Now that seems to me like Vgs would always be 0V and the FET would never turn on.

I am absolutely certain that my analysis is wrong, I am just not seeing where.

Thank you in advance for all advice.

Best Answer

"Triggered" suggests something that will suddenly switch from one state to another. That's probably not the right word.

As this is an analog circuit we can expect M2 to turn on gradually under certain conditions. "Turned on" would be a better term.

Since the feedback is taken after M2 it means that the output of the op-amp will go as high as it needs to to turn on M2 enough to get the feedback voltage to match the input voltage.

schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. Running the CircuitLab DC Solver for 4 V in results in 8 V at NODE1.